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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org, Markus Armbruster <armbru@redhat.com>
Cc: qemu-arm@nongnu.org, qemu-block@nongnu.org,
	"David Gibson" <david@gibson.dropbear.id.au>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Alexander Graf" <agraf@csgraf.de>,
	"Peter Maydell" <peter.maydell@linaro.org>
Subject: [PATCH 02/11] target/arm: Clean up local variable shadowing
Date: Fri,  1 Sep 2023 00:55:57 +0200	[thread overview]
Message-ID: <20230831225607.30829-3-philmd@linaro.org> (raw)
In-Reply-To: <20230831225607.30829-1-philmd@linaro.org>

Fix:

  target/arm/tcg/translate-m-nocp.c:509:18: error: declaration shadows a local variable [-Werror,-Wshadow]
        TCGv_i32 tmp = load_cpu_field(v7m.fpdscr[M_REG_NS]);
                 ^
  target/arm/tcg/translate-m-nocp.c:433:14: note: previous declaration is here
    TCGv_i32 tmp;
             ^
  target/arm/tcg/mve_helper.c:2463:17: error: declaration shadows a local variable [-Werror,-Wshadow]
        int64_t extval = sextract64(src << shift, 0, 48);
                ^
  target/arm/tcg/mve_helper.c:2443:18: note: previous declaration is here
    int64_t val, extval;
                 ^
  target/arm/hvf/hvf.c:1936:13: error: declaration shadows a local variable [-Werror,-Wshadow]
        int ret = 0;
            ^
  target/arm/hvf/hvf.c:1807:9: note: previous declaration is here
    int ret;
        ^

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/arm/hvf/hvf.c              | 1 -
 target/arm/tcg/mve_helper.c       | 8 ++++----
 target/arm/tcg/translate-m-nocp.c | 2 +-
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 486f90be1d..20d534faef 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -1933,7 +1933,6 @@ int hvf_vcpu_exec(CPUState *cpu)
         uint32_t rt = (syndrome >> 5) & 0x1f;
         uint32_t reg = syndrome & SYSREG_MASK;
         uint64_t val;
-        int ret = 0;
 
         if (isread) {
             ret = hvf_sysreg_read(cpu, reg, rt);
diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c
index 403b345ea3..32087b6f0a 100644
--- a/target/arm/tcg/mve_helper.c
+++ b/target/arm/tcg/mve_helper.c
@@ -924,8 +924,8 @@ DO_1OP_IMM(vorri, DO_ORRI)
         bool qc = false;                                                \
         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
             bool sat = false;                                           \
-            TYPE r = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat);          \
-            mergemask(&d[H##ESIZE(e)], r, mask);                        \
+            TYPE r_ = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat);         \
+            mergemask(&d[H##ESIZE(e)], r_, mask);                       \
             qc |= sat & mask & 1;                                       \
         }                                                               \
         if (qc) {                                                       \
@@ -2460,7 +2460,7 @@ static inline int64_t do_sqrshl48_d(int64_t src, int64_t shift,
             return extval;
         }
     } else if (shift < 48) {
-        int64_t extval = sextract64(src << shift, 0, 48);
+        extval = sextract64(src << shift, 0, 48);
         if (!sat || src == (extval >> shift)) {
             return extval;
         }
@@ -2492,7 +2492,7 @@ static inline uint64_t do_uqrshl48_d(uint64_t src, int64_t shift,
             return extval;
         }
     } else if (shift < 48) {
-        uint64_t extval = extract64(src << shift, 0, 48);
+        extval = extract64(src << shift, 0, 48);
         if (!sat || src == (extval >> shift)) {
             return extval;
         }
diff --git a/target/arm/tcg/translate-m-nocp.c b/target/arm/tcg/translate-m-nocp.c
index 33f6478bb9..42308c4db5 100644
--- a/target/arm/tcg/translate-m-nocp.c
+++ b/target/arm/tcg/translate-m-nocp.c
@@ -506,7 +506,7 @@ static bool gen_M_fp_sysreg_read(DisasContext *s, int regno,
 
         gen_branch_fpInactive(s, TCG_COND_EQ, lab_active);
         /* fpInactive case: reads as FPDSCR_NS */
-        TCGv_i32 tmp = load_cpu_field(v7m.fpdscr[M_REG_NS]);
+        tmp = load_cpu_field(v7m.fpdscr[M_REG_NS]);
         storefn(s, opaque, tmp, true);
         lab_end = gen_new_label();
         tcg_gen_br(lab_end);
-- 
2.41.0



  parent reply	other threads:[~2023-08-31 22:58 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-31 22:55 [PATCH 00/11] (few more) Steps towards enabling -Wshadow Philippe Mathieu-Daudé
2023-08-31 22:55 ` [PATCH 01/11] tcg: Clean up local variable shadowing Philippe Mathieu-Daudé
2023-09-01  0:38   ` Richard Henderson
2023-09-04 12:52     ` Philippe Mathieu-Daudé
2023-08-31 22:55 ` Philippe Mathieu-Daudé [this message]
2023-09-01 10:46   ` [PATCH 02/11] target/arm: " Peter Maydell
2023-09-04 14:06     ` Philippe Mathieu-Daudé
2023-08-31 22:55 ` [PATCH 03/11] target/mips: " Philippe Mathieu-Daudé
2023-08-31 22:55 ` [PATCH 04/11] target/m68k: " Philippe Mathieu-Daudé
2023-09-01 11:31   ` Peter Maydell
2023-08-31 22:56 ` [PATCH 05/11] hw/arm/virt: " Philippe Mathieu-Daudé
2023-09-01 11:28   ` Peter Maydell
2023-08-31 22:56 ` [PATCH 06/11] hw/arm/allwinner: " Philippe Mathieu-Daudé
2023-09-01 11:29   ` Peter Maydell
2023-08-31 22:56 ` [PATCH 07/11] hw/arm/aspeed: " Philippe Mathieu-Daudé
2023-09-01  5:47   ` Cédric Le Goater
2023-08-31 22:56 ` [PATCH 08/11] hw/m68k: " Philippe Mathieu-Daudé
2023-08-31 22:56 ` [PATCH 09/11] hw/ide/ahci: " Philippe Mathieu-Daudé
2023-08-31 22:56 ` [PATCH 10/11] net/eth: " Philippe Mathieu-Daudé
2023-09-01  7:07   ` Akihiko Odaki
2023-09-04 12:57     ` Philippe Mathieu-Daudé
2023-08-31 22:56 ` [PATCH 11/11] sysemu/device_tree: " Philippe Mathieu-Daudé
2023-09-01  8:04 ` [PATCH 00/11] (few more) Steps towards enabling -Wshadow Markus Armbruster

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