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From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Cédric Le Goater" <clg@kaod.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>
Subject: [PULL 01/26] aspeed: Introduce helper for 32-bit hosts limitation
Date: Fri,  1 Sep 2023 11:41:49 +0200	[thread overview]
Message-ID: <20230901094214.296918-2-clg@kaod.org> (raw)
In-Reply-To: <20230901094214.296918-1-clg@kaod.org>

On 32-bit hosts, RAM has a 2047 MB limit. Use a macro to define the
default ram size of machines (AST2600 SoC) that can have 2 GB.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/arm/aspeed.c | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 263626abeae1..b922a2c491cc 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -47,6 +47,13 @@ struct AspeedMachineState {
     char *spi_model;
 };
 
+/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
+#if HOST_LONG_BITS == 32
+#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
+#else
+#define ASPEED_RAM_SIZE(sz) (sz)
+#endif
+
 /* Palmetto hardware value: 0x120CE416 */
 #define PALMETTO_BMC_HW_STRAP1 (                                        \
         SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) |               \
@@ -1423,12 +1430,7 @@ static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data)
         aspeed_soc_num_cpus(amc->soc_name);
 };
 
-/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
-#if HOST_LONG_BITS == 32
-#define FUJI_BMC_RAM_SIZE (1 * GiB)
-#else
-#define FUJI_BMC_RAM_SIZE (2 * GiB)
-#endif
+#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
 
 static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
 {
@@ -1450,12 +1452,7 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data)
         aspeed_soc_num_cpus(amc->soc_name);
 };
 
-/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
-#if HOST_LONG_BITS == 32
-#define BLETCHLEY_BMC_RAM_SIZE (1 * GiB)
-#else
-#define BLETCHLEY_BMC_RAM_SIZE (2 * GiB)
-#endif
+#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
 
 static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
 {
-- 
2.41.0



  reply	other threads:[~2023-09-01  9:43 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-01  9:41 [PULL 00/26] aspeed queue Cédric Le Goater
2023-09-01  9:41 ` Cédric Le Goater [this message]
2023-09-01  9:41 ` [PULL 02/26] hw/i2c/aspeed: Fix Tx count and Rx size error in buffer pool mode Cédric Le Goater
2023-09-01  9:41 ` [PULL 03/26] hw/i2c/aspeed: Fix TXBUF transmission start position error Cédric Le Goater
2023-09-01  9:41 ` [PULL 04/26] hw/i2c/aspeed: Add support for buffer organization Cédric Le Goater
2023-09-01  9:41 ` [PULL 05/26] tests/avocado/machine_aspeed.py: Update SDK images Cédric Le Goater
2023-09-01  9:41 ` [PULL 06/26] hw/ssi: Add a "cs" property to SSIPeripheral Cédric Le Goater
2023-09-01  9:41 ` [PULL 07/26] hw/ssi: Introduce a ssi_get_cs() helper Cédric Le Goater
2023-09-01  9:41 ` [PULL 08/26] aspeed/smc: Wire CS lines at reset Cédric Le Goater
2023-09-01  9:41 ` [PULL 09/26] hw/ssi: Check for duplicate CS indexes Cédric Le Goater
2023-09-01  9:41 ` [PULL 10/26] aspeed: Create flash devices only when defaults are enabled Cédric Le Goater
2023-09-01  9:41 ` [PULL 11/26] m25p80: Introduce an helper to retrieve the BlockBackend of a device Cédric Le Goater
2023-09-01  9:42 ` [PULL 12/26] aspeed: Get the BlockBackend of FMC0 from the flash device Cédric Le Goater
2023-09-01  9:42 ` [PULL 13/26] hw/sd/sdcard: Return ILLEGAL for CMD19/CMD23 prior SD spec v3.01 Cédric Le Goater
2023-09-01  9:42 ` [PULL 14/26] hw/sd: When card is in wrong state, log which state it is Cédric Le Goater
2023-09-01  9:42 ` [PULL 15/26] hw/sd: When card is in wrong state, log which spec version is used Cédric Le Goater
2023-09-01  9:42 ` [PULL 16/26] hw/sd: Move proto_name to SDProto structure Cédric Le Goater
2023-09-01  9:42 ` [PULL 17/26] hw/sd: Introduce sd_cmd_handler type Cédric Le Goater
2023-09-01  9:42 ` [PULL 18/26] hw/sd: Add sd_cmd_illegal() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 19/26] hw/sd: Add sd_cmd_unimplemented() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 20/26] hw/sd: Add sd_cmd_GO_IDLE_STATE() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 21/26] hw/sd: Add sd_cmd_SEND_OP_CMD() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 22/26] hw/sd: Add sd_cmd_ALL_SEND_CID() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 23/26] hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 24/26] hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 25/26] hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 26/26] hw/sd: Introduce a "sd-card" SPI variant model Cédric Le Goater
2023-09-06 18:24 ` [PULL 00/26] aspeed queue Stefan Hajnoczi
2023-09-08  7:09 ` Cédric Le Goater
2023-09-08  7:52   ` Michael Tokarev
2023-09-08  8:25     ` Cédric Le Goater

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