From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Hang Yu" <francis_yuu@stu.pku.edu.cn>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 02/26] hw/i2c/aspeed: Fix Tx count and Rx size error in buffer pool mode
Date: Fri, 1 Sep 2023 11:41:50 +0200 [thread overview]
Message-ID: <20230901094214.296918-3-clg@kaod.org> (raw)
In-Reply-To: <20230901094214.296918-1-clg@kaod.org>
From: Hang Yu <francis_yuu@stu.pku.edu.cn>
Fixed inconsistency between the regisiter bit field definition header file
and the ast2600 datasheet. The reg name is I2CD1C:Pool Buffer Control
Register in old register mode and I2CC0C: Master/Slave Pool Buffer Control
Register in new register mode. They share bit field
[12:8]:Transmit Data Byte Count and bit field
[29:24]:Actual Received Pool Buffer Size according to the datasheet.
According to the ast2600 datasheet,the actual Tx count is
Transmit Data Byte Count plus 1, and the max Rx size is
Receive Pool Buffer Size plus 1, both in Pool Buffer Control Register.
The version before forgot to plus 1, and mistake Rx count for Rx size.
Signed-off-by: Hang Yu <francis_yuu@stu.pku.edu.cn>
Fixes: 3be3d6ccf2ad ("aspeed: i2c: Migrate to registerfields API")
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/i2c/aspeed_i2c.h | 4 ++--
hw/i2c/aspeed_i2c.c | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index 51c944efeaae..2e1e15aaf0f7 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -139,9 +139,9 @@ REG32(I2CD_CMD, 0x14) /* I2CD Command/Status */
REG32(I2CD_DEV_ADDR, 0x18) /* Slave Device Address */
SHARED_FIELD(SLAVE_DEV_ADDR1, 0, 7)
REG32(I2CD_POOL_CTRL, 0x1C) /* Pool Buffer Control */
- SHARED_FIELD(RX_COUNT, 24, 5)
+ SHARED_FIELD(RX_COUNT, 24, 6)
SHARED_FIELD(RX_SIZE, 16, 5)
- SHARED_FIELD(TX_COUNT, 9, 5)
+ SHARED_FIELD(TX_COUNT, 8, 5)
FIELD(I2CD_POOL_CTRL, OFFSET, 2, 6) /* AST2400 */
REG32(I2CD_BYTE_BUF, 0x20) /* Transmit/Receive Byte Buffer */
SHARED_FIELD(RX_BUF, 8, 8)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 1f071a3811f7..e485d8bfb836 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -236,7 +236,7 @@ static int aspeed_i2c_bus_send(AspeedI2CBus *bus, uint8_t pool_start)
uint32_t reg_byte_buf = aspeed_i2c_bus_byte_buf_offset(bus);
uint32_t reg_dma_len = aspeed_i2c_bus_dma_len_offset(bus);
int pool_tx_count = SHARED_ARRAY_FIELD_EX32(bus->regs, reg_pool_ctrl,
- TX_COUNT);
+ TX_COUNT) + 1;
if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, TX_BUFF_EN)) {
for (i = pool_start; i < pool_tx_count; i++) {
@@ -293,7 +293,7 @@ static void aspeed_i2c_bus_recv(AspeedI2CBus *bus)
uint32_t reg_dma_len = aspeed_i2c_bus_dma_len_offset(bus);
uint32_t reg_dma_addr = aspeed_i2c_bus_dma_addr_offset(bus);
int pool_rx_count = SHARED_ARRAY_FIELD_EX32(bus->regs, reg_pool_ctrl,
- RX_COUNT);
+ RX_SIZE) + 1;
if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, RX_BUFF_EN)) {
uint8_t *pool_base = aic->bus_pool_base(bus);
@@ -418,7 +418,7 @@ static void aspeed_i2c_bus_cmd_dump(AspeedI2CBus *bus)
uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus);
uint32_t reg_dma_len = aspeed_i2c_bus_dma_len_offset(bus);
if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, RX_BUFF_EN)) {
- count = SHARED_ARRAY_FIELD_EX32(bus->regs, reg_pool_ctrl, TX_COUNT);
+ count = SHARED_ARRAY_FIELD_EX32(bus->regs, reg_pool_ctrl, TX_COUNT) + 1;
} else if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, RX_DMA_EN)) {
count = bus->regs[reg_dma_len];
} else { /* BYTE mode */
@@ -490,7 +490,7 @@ static void aspeed_i2c_bus_handle_cmd(AspeedI2CBus *bus, uint64_t value)
*/
if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, TX_BUFF_EN)) {
if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_pool_ctrl, TX_COUNT)
- == 1) {
+ == 0) {
SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, M_TX_CMD, 0);
} else {
/*
--
2.41.0
next prev parent reply other threads:[~2023-09-01 9:44 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-01 9:41 [PULL 00/26] aspeed queue Cédric Le Goater
2023-09-01 9:41 ` [PULL 01/26] aspeed: Introduce helper for 32-bit hosts limitation Cédric Le Goater
2023-09-01 9:41 ` Cédric Le Goater [this message]
2023-09-01 9:41 ` [PULL 03/26] hw/i2c/aspeed: Fix TXBUF transmission start position error Cédric Le Goater
2023-09-01 9:41 ` [PULL 04/26] hw/i2c/aspeed: Add support for buffer organization Cédric Le Goater
2023-09-01 9:41 ` [PULL 05/26] tests/avocado/machine_aspeed.py: Update SDK images Cédric Le Goater
2023-09-01 9:41 ` [PULL 06/26] hw/ssi: Add a "cs" property to SSIPeripheral Cédric Le Goater
2023-09-01 9:41 ` [PULL 07/26] hw/ssi: Introduce a ssi_get_cs() helper Cédric Le Goater
2023-09-01 9:41 ` [PULL 08/26] aspeed/smc: Wire CS lines at reset Cédric Le Goater
2023-09-01 9:41 ` [PULL 09/26] hw/ssi: Check for duplicate CS indexes Cédric Le Goater
2023-09-01 9:41 ` [PULL 10/26] aspeed: Create flash devices only when defaults are enabled Cédric Le Goater
2023-09-01 9:41 ` [PULL 11/26] m25p80: Introduce an helper to retrieve the BlockBackend of a device Cédric Le Goater
2023-09-01 9:42 ` [PULL 12/26] aspeed: Get the BlockBackend of FMC0 from the flash device Cédric Le Goater
2023-09-01 9:42 ` [PULL 13/26] hw/sd/sdcard: Return ILLEGAL for CMD19/CMD23 prior SD spec v3.01 Cédric Le Goater
2023-09-01 9:42 ` [PULL 14/26] hw/sd: When card is in wrong state, log which state it is Cédric Le Goater
2023-09-01 9:42 ` [PULL 15/26] hw/sd: When card is in wrong state, log which spec version is used Cédric Le Goater
2023-09-01 9:42 ` [PULL 16/26] hw/sd: Move proto_name to SDProto structure Cédric Le Goater
2023-09-01 9:42 ` [PULL 17/26] hw/sd: Introduce sd_cmd_handler type Cédric Le Goater
2023-09-01 9:42 ` [PULL 18/26] hw/sd: Add sd_cmd_illegal() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 19/26] hw/sd: Add sd_cmd_unimplemented() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 20/26] hw/sd: Add sd_cmd_GO_IDLE_STATE() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 21/26] hw/sd: Add sd_cmd_SEND_OP_CMD() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 22/26] hw/sd: Add sd_cmd_ALL_SEND_CID() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 23/26] hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 24/26] hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 25/26] hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler Cédric Le Goater
2023-09-01 9:42 ` [PULL 26/26] hw/sd: Introduce a "sd-card" SPI variant model Cédric Le Goater
2023-09-06 18:24 ` [PULL 00/26] aspeed queue Stefan Hajnoczi
2023-09-08 7:09 ` Cédric Le Goater
2023-09-08 7:52 ` Michael Tokarev
2023-09-08 8:25 ` Cédric Le Goater
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