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From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Hang Yu" <francis_yuu@stu.pku.edu.cn>,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 03/26] hw/i2c/aspeed: Fix TXBUF transmission start position error
Date: Fri,  1 Sep 2023 11:41:51 +0200	[thread overview]
Message-ID: <20230901094214.296918-4-clg@kaod.org> (raw)
In-Reply-To: <20230901094214.296918-1-clg@kaod.org>

From: Hang Yu <francis_yuu@stu.pku.edu.cn>

According to the ast2600 datasheet and the linux aspeed i2c driver,
the TXBUF transmission start position should be TXBUF[0] instead
of TXBUF[1],so the arg pool_start is useless,and the address is not
included in TXBUF.So even if Tx Count equals zero,there is at least
1 byte data needs to be transmitted,and M_TX_CMD should not be cleared
at this condition.The driver url is:
https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v5.15/drivers/i2c/busses/i2c-ast2600.c

Signed-off-by: Hang Yu <francis_yuu@stu.pku.edu.cn>
Fixes: 6054fc73e8f4 ("aspeed/i2c: Add support for pool buffer transfers")
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/i2c/aspeed_i2c.c | 30 ++++++------------------------
 1 file changed, 6 insertions(+), 24 deletions(-)

diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index e485d8bfb836..44905d789998 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -226,7 +226,7 @@ static int aspeed_i2c_dma_read(AspeedI2CBus *bus, uint8_t *data)
     return 0;
 }
 
-static int aspeed_i2c_bus_send(AspeedI2CBus *bus, uint8_t pool_start)
+static int aspeed_i2c_bus_send(AspeedI2CBus *bus)
 {
     AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(bus->controller);
     int ret = -1;
@@ -239,7 +239,7 @@ static int aspeed_i2c_bus_send(AspeedI2CBus *bus, uint8_t pool_start)
                                                 TX_COUNT) + 1;
 
     if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, TX_BUFF_EN)) {
-        for (i = pool_start; i < pool_tx_count; i++) {
+        for (i = 0; i < pool_tx_count; i++) {
             uint8_t *pool_base = aic->bus_pool_base(bus);
 
             trace_aspeed_i2c_bus_send("BUF", i + 1, pool_tx_count,
@@ -273,7 +273,7 @@ static int aspeed_i2c_bus_send(AspeedI2CBus *bus, uint8_t pool_start)
         }
         SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, TX_DMA_EN, 0);
     } else {
-        trace_aspeed_i2c_bus_send("BYTE", pool_start, 1,
+        trace_aspeed_i2c_bus_send("BYTE", 0, 1,
                                   bus->regs[reg_byte_buf]);
         ret = i2c_send(bus->bus, bus->regs[reg_byte_buf]);
     }
@@ -446,10 +446,8 @@ static void aspeed_i2c_bus_cmd_dump(AspeedI2CBus *bus)
  */
 static void aspeed_i2c_bus_handle_cmd(AspeedI2CBus *bus, uint64_t value)
 {
-    uint8_t pool_start = 0;
     uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus);
     uint32_t reg_cmd = aspeed_i2c_bus_cmd_offset(bus);
-    uint32_t reg_pool_ctrl = aspeed_i2c_bus_pool_ctrl_offset(bus);
     uint32_t reg_dma_len = aspeed_i2c_bus_dma_len_offset(bus);
 
     if (!aspeed_i2c_check_sram(bus)) {
@@ -483,27 +481,11 @@ static void aspeed_i2c_bus_handle_cmd(AspeedI2CBus *bus, uint64_t value)
 
         SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, M_START_CMD, 0);
 
-        /*
-         * The START command is also a TX command, as the slave
-         * address is sent on the bus. Drop the TX flag if nothing
-         * else needs to be sent in this sequence.
-         */
-        if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, TX_BUFF_EN)) {
-            if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_pool_ctrl, TX_COUNT)
-                == 0) {
-                SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, M_TX_CMD, 0);
-            } else {
-                /*
-                 * Increase the start index in the TX pool buffer to
-                 * skip the address byte.
-                 */
-                pool_start++;
-            }
-        } else if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, TX_DMA_EN)) {
+        if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, TX_DMA_EN)) {
             if (bus->regs[reg_dma_len] == 0) {
                 SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, M_TX_CMD, 0);
             }
-        } else {
+        } else if (!SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, TX_BUFF_EN)) {
             SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, M_TX_CMD, 0);
         }
 
@@ -520,7 +502,7 @@ static void aspeed_i2c_bus_handle_cmd(AspeedI2CBus *bus, uint64_t value)
 
     if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, M_TX_CMD)) {
         aspeed_i2c_set_state(bus, I2CD_MTXD);
-        if (aspeed_i2c_bus_send(bus, pool_start)) {
+        if (aspeed_i2c_bus_send(bus)) {
             SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, TX_NAK, 1);
             i2c_end_transfer(bus->bus);
         } else {
-- 
2.41.0



  parent reply	other threads:[~2023-09-01  9:44 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-01  9:41 [PULL 00/26] aspeed queue Cédric Le Goater
2023-09-01  9:41 ` [PULL 01/26] aspeed: Introduce helper for 32-bit hosts limitation Cédric Le Goater
2023-09-01  9:41 ` [PULL 02/26] hw/i2c/aspeed: Fix Tx count and Rx size error in buffer pool mode Cédric Le Goater
2023-09-01  9:41 ` Cédric Le Goater [this message]
2023-09-01  9:41 ` [PULL 04/26] hw/i2c/aspeed: Add support for buffer organization Cédric Le Goater
2023-09-01  9:41 ` [PULL 05/26] tests/avocado/machine_aspeed.py: Update SDK images Cédric Le Goater
2023-09-01  9:41 ` [PULL 06/26] hw/ssi: Add a "cs" property to SSIPeripheral Cédric Le Goater
2023-09-01  9:41 ` [PULL 07/26] hw/ssi: Introduce a ssi_get_cs() helper Cédric Le Goater
2023-09-01  9:41 ` [PULL 08/26] aspeed/smc: Wire CS lines at reset Cédric Le Goater
2023-09-01  9:41 ` [PULL 09/26] hw/ssi: Check for duplicate CS indexes Cédric Le Goater
2023-09-01  9:41 ` [PULL 10/26] aspeed: Create flash devices only when defaults are enabled Cédric Le Goater
2023-09-01  9:41 ` [PULL 11/26] m25p80: Introduce an helper to retrieve the BlockBackend of a device Cédric Le Goater
2023-09-01  9:42 ` [PULL 12/26] aspeed: Get the BlockBackend of FMC0 from the flash device Cédric Le Goater
2023-09-01  9:42 ` [PULL 13/26] hw/sd/sdcard: Return ILLEGAL for CMD19/CMD23 prior SD spec v3.01 Cédric Le Goater
2023-09-01  9:42 ` [PULL 14/26] hw/sd: When card is in wrong state, log which state it is Cédric Le Goater
2023-09-01  9:42 ` [PULL 15/26] hw/sd: When card is in wrong state, log which spec version is used Cédric Le Goater
2023-09-01  9:42 ` [PULL 16/26] hw/sd: Move proto_name to SDProto structure Cédric Le Goater
2023-09-01  9:42 ` [PULL 17/26] hw/sd: Introduce sd_cmd_handler type Cédric Le Goater
2023-09-01  9:42 ` [PULL 18/26] hw/sd: Add sd_cmd_illegal() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 19/26] hw/sd: Add sd_cmd_unimplemented() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 20/26] hw/sd: Add sd_cmd_GO_IDLE_STATE() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 21/26] hw/sd: Add sd_cmd_SEND_OP_CMD() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 22/26] hw/sd: Add sd_cmd_ALL_SEND_CID() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 23/26] hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 24/26] hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 25/26] hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler Cédric Le Goater
2023-09-01  9:42 ` [PULL 26/26] hw/sd: Introduce a "sd-card" SPI variant model Cédric Le Goater
2023-09-06 18:24 ` [PULL 00/26] aspeed queue Stefan Hajnoczi
2023-09-08  7:09 ` Cédric Le Goater
2023-09-08  7:52   ` Michael Tokarev
2023-09-08  8:25     ` Cédric Le Goater

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