From: Jiajie Chen <c@jia.je>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, gaosong@loongson.cn,
git@xen0n.name, Jiajie Chen <c@jia.je>
Subject: [PATCH v3 14/16] tcg/loongarch64: Lower rotv_vec ops to LSX
Date: Sat, 2 Sep 2023 13:02:14 +0800 [thread overview]
Message-ID: <20230902050415.1832700-15-c@jia.je> (raw)
In-Reply-To: <20230902050415.1832700-1-c@jia.je>
Lower the following ops:
- rotrv_vec
- rotlv_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 14 ++++++++++++++
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 8ac008b907..95359b1757 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1710,6 +1710,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
static const LoongArchInsn sari_vec_insn[4] = {
OPC_VSRAI_B, OPC_VSRAI_H, OPC_VSRAI_W, OPC_VSRAI_D
};
+ static const LoongArchInsn rotrv_vec_insn[4] = {
+ OPC_VROTR_B, OPC_VROTR_H, OPC_VROTR_W, OPC_VROTR_D
+ };
a0 = args[0];
a1 = args[1];
@@ -1889,6 +1892,15 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_sari_vec:
tcg_out32(s, encode_vdvjuk3_insn(sari_vec_insn[vece], a0, a1, a2));
break;
+ case INDEX_op_rotrv_vec:
+ tcg_out32(s, encode_vdvjvk_insn(rotrv_vec_insn[vece], a0, a1, a2));
+ break;
+ case INDEX_op_rotlv_vec:
+ /* rotlv_vec a1, a2 = rotrv_vec a1, -a2 */
+ tcg_out32(s, encode_vdvj_insn(neg_vec_insn[vece], temp_vec, a2));
+ tcg_out32(s, encode_vdvjvk_insn(rotrv_vec_insn[vece], a0, a1,
+ temp_vec));
+ break;
case INDEX_op_bitsel_vec:
/* vbitsel vd, vj, vk, va = bitsel_vec vd, va, vk, vj */
tcg_out_opc_vbitsel_v(s, a0, a3, a2, a1);
@@ -2118,6 +2130,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_shlv_vec:
case INDEX_op_shrv_vec:
case INDEX_op_sarv_vec:
+ case INDEX_op_rotrv_vec:
+ case INDEX_op_rotlv_vec:
return C_O1_I2(w, w, w);
case INDEX_op_not_vec:
diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h
index d7b806e252..d5c69bc192 100644
--- a/tcg/loongarch64/tcg-target.h
+++ b/tcg/loongarch64/tcg-target.h
@@ -191,7 +191,7 @@ extern bool use_lsx_instructions;
#define TCG_TARGET_HAS_shv_vec 1
#define TCG_TARGET_HAS_roti_vec 0
#define TCG_TARGET_HAS_rots_vec 0
-#define TCG_TARGET_HAS_rotv_vec 0
+#define TCG_TARGET_HAS_rotv_vec 1
#define TCG_TARGET_HAS_sat_vec 1
#define TCG_TARGET_HAS_minmax_vec 1
#define TCG_TARGET_HAS_bitsel_vec 1
--
2.42.0
next prev parent reply other threads:[~2023-09-02 5:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-02 5:02 [PATCH v3 00/16] Lower TCG vector ops to LSX Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 01/16] tcg/loongarch64: Import LSX instructions Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 02/16] tcg/loongarch64: Lower basic tcg vec ops to LSX Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 03/16] tcg: pass vece to tcg_target_const_match() Jiajie Chen
2023-09-03 0:50 ` Richard Henderson
2023-09-02 5:02 ` [PATCH v3 04/16] tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt Jiajie Chen
2023-09-03 0:50 ` Richard Henderson
2023-09-02 5:02 ` [PATCH v3 05/16] tcg/loongarch64: Lower add/sub_vec to vadd/vsub Jiajie Chen
2023-09-03 0:54 ` Richard Henderson
2023-09-02 5:02 ` [PATCH v3 06/16] tcg/loongarch64: Lower vector bitwise operations Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 07/16] tcg/loongarch64: Lower neg_vec to vneg Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 08/16] tcg/loongarch64: Lower mul_vec to vmul Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 09/16] tcg/loongarch64: Lower vector min max ops Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 10/16] tcg/loongarch64: Lower vector saturated ops Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 11/16] tcg/loongarch64: Lower vector shift vector ops Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 12/16] tcg/loongarch64: Lower bitsel_vec to vbitsel Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 13/16] tcg/loongarch64: Lower vector shift integer ops Jiajie Chen
2023-09-02 5:02 ` Jiajie Chen [this message]
2023-09-02 5:02 ` [PATCH v3 15/16] tcg/loongarch64: Lower rotli_vec to vrotri Jiajie Chen
2023-09-02 5:02 ` [PATCH v3 16/16] tcg/loongarch64: Implement 128-bit load & store Jiajie Chen
2023-09-03 1:06 ` Richard Henderson
2023-09-03 1:10 ` Jiajie Chen
2023-09-04 1:43 ` gaosong
2023-09-04 9:43 ` bibo mao
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