From: John Snow <jsnow@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Thomas Huth" <thuth@redhat.com>, "John Snow" <jsnow@redhat.com>,
"Laurent Vivier" <lvivier@redhat.com>,
qemu-block@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Niklas Cassel" <niklas.cassel@wdc.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL for-6.2 6/7] hw/ide/ahci: fix ahci_write_fis_sdb()
Date: Wed, 6 Sep 2023 23:42:27 -0400 [thread overview]
Message-ID: <20230907034228.4054839-7-jsnow@redhat.com> (raw)
In-Reply-To: <20230907034228.4054839-1-jsnow@redhat.com>
From: Niklas Cassel <niklas.cassel@wdc.com>
When there is an error, we need to raise a TFES error irq, see AHCI 1.3.1,
5.3.13.1 SDB:Entry.
If ERR_STAT is set, we jump to state ERR:FatalTaskfile, which will raise
a TFES IRQ unconditionally, regardless if the I bit is set in the FIS or
not.
Thus, we should never raise a normal IRQ after having sent an error IRQ.
It is valid to signal successfully completed commands as finished in the
same SDB FIS that generates the error IRQ. The important thing is that
commands that did not complete successfully (e.g. commands that were
aborted, do not get the finished bit set).
Before this commit, there was never a TFES IRQ raised on NCQ error.
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230609140844.202795-8-nks@flawful.org
Signed-off-by: John Snow <jsnow@redhat.com>
---
hw/ide/ahci.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 12aaadc554..ef6c9fc378 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -806,8 +806,14 @@ static void ahci_write_fis_sdb(AHCIState *s, NCQTransferState *ncq_tfs)
pr->scr_act &= ~ad->finished;
ad->finished = 0;
- /* Trigger IRQ if interrupt bit is set (which currently, it always is) */
- if (sdb_fis->flags & 0x40) {
+ /*
+ * TFES IRQ is always raised if ERR_STAT is set, regardless of I bit.
+ * If ERR_STAT is not set, trigger SDBS IRQ if interrupt bit is set
+ * (which currently, it always is).
+ */
+ if (sdb_fis->status & ERR_STAT) {
+ ahci_trigger_irq(s, ad, AHCI_PORT_IRQ_BIT_TFES);
+ } else if (sdb_fis->flags & 0x40) {
ahci_trigger_irq(s, ad, AHCI_PORT_IRQ_BIT_SDBS);
}
}
--
2.41.0
next prev parent reply other threads:[~2023-09-07 3:44 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-07 3:42 [PULL for-6.2 0/7] Ide patches John Snow
2023-09-07 3:42 ` [PULL for-6.2 1/7] hw/ide/core: set ERR_STAT in unsupported command completion John Snow
2023-09-07 3:42 ` [PULL for-6.2 2/7] hw/ide/ahci: write D2H FIS when processing NCQ command John Snow
2023-09-07 3:42 ` [PULL for-6.2 3/7] hw/ide/ahci: simplify and document PxCI handling John Snow
2023-09-07 3:42 ` [PULL for-6.2 4/7] hw/ide/ahci: PxSACT and PxCI is cleared when PxCMD.ST is cleared John Snow
2023-09-07 3:42 ` [PULL for-6.2 5/7] hw/ide/ahci: PxCI should not get cleared when ERR_STAT is set John Snow
2023-09-07 3:42 ` John Snow [this message]
2023-09-07 3:42 ` [PULL for-6.2 7/7] hw/ide/ahci: fix broken SError handling John Snow
2023-09-07 3:43 ` [PULL for-6.2 0/7] Ide patches John Snow
2023-09-07 6:08 ` Philippe Mathieu-Daudé
2023-09-07 15:43 ` Stefan Hajnoczi
2023-09-07 16:49 ` Michael Tokarev
2023-09-07 16:54 ` John Snow
2023-09-07 18:16 ` Michael Tokarev
2023-09-08 7:53 ` Philippe Mathieu-Daudé
2023-09-08 8:06 ` Michael Tokarev
2023-09-08 8:26 ` Michael Tokarev
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