From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 03/14] target/arm: Add ID_AA64ISAR2_EL1
Date: Thu, 7 Sep 2023 17:03:29 +0100 [thread overview]
Message-ID: <20230907160340.260094-4-peter.maydell@linaro.org> (raw)
In-Reply-To: <20230907160340.260094-1-peter.maydell@linaro.org>
From: Aaron Lindsay <aaron@os.amperecomputing.com>
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
[PMM: drop the HVF part of the patch and just comment that
we need to do something when the register appears in that API]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu.h | 1 +
target/arm/helper.c | 4 ++--
target/arm/hvf/hvf.c | 1 +
target/arm/kvm64.c | 2 ++
4 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 278cc135c23..9b76cc68c6d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1033,6 +1033,7 @@ struct ArchCPU {
uint32_t dbgdevid1;
uint64_t id_aa64isar0;
uint64_t id_aa64isar1;
+ uint64_t id_aa64isar2;
uint64_t id_aa64pfr0;
uint64_t id_aa64pfr1;
uint64_t id_aa64mmfr0;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e3f5a7d2bdc..f9f7c3c39e9 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8435,11 +8435,11 @@ void register_cp_regs_for_features(ARMCPU *cpu)
.access = PL1_R, .type = ARM_CP_CONST,
.accessfn = access_aa64_tid3,
.resetvalue = cpu->isar.id_aa64isar1 },
- { .name = "ID_AA64ISAR2_EL1_RESERVED", .state = ARM_CP_STATE_AA64,
+ { .name = "ID_AA64ISAR2_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 6, .opc2 = 2,
.access = PL1_R, .type = ARM_CP_CONST,
.accessfn = access_aa64_tid3,
- .resetvalue = 0 },
+ .resetvalue = cpu->isar.id_aa64isar2 },
{ .name = "ID_AA64ISAR3_EL1_RESERVED", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 6, .opc2 = 3,
.access = PL1_R, .type = ARM_CP_CONST,
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 486f90be1d2..546c0e817f4 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -847,6 +847,7 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
{ HV_SYS_REG_ID_AA64DFR1_EL1, &host_isar.id_aa64dfr1 },
{ HV_SYS_REG_ID_AA64ISAR0_EL1, &host_isar.id_aa64isar0 },
{ HV_SYS_REG_ID_AA64ISAR1_EL1, &host_isar.id_aa64isar1 },
+ /* Add ID_AA64ISAR2_EL1 here when HVF supports it */
{ HV_SYS_REG_ID_AA64MMFR0_EL1, &host_isar.id_aa64mmfr0 },
{ HV_SYS_REG_ID_AA64MMFR1_EL1, &host_isar.id_aa64mmfr1 },
{ HV_SYS_REG_ID_AA64MMFR2_EL1, &host_isar.id_aa64mmfr2 },
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 4d904a1d11b..ac440c33f9a 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -304,6 +304,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
ARM64_SYS_REG(3, 0, 0, 6, 0));
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar1,
ARM64_SYS_REG(3, 0, 0, 6, 1));
+ err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar2,
+ ARM64_SYS_REG(3, 0, 0, 6, 2));
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr0,
ARM64_SYS_REG(3, 0, 0, 7, 0));
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr1,
--
2.34.1
next prev parent reply other threads:[~2023-09-07 16:05 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-07 16:03 [PATCH 00/14] target/arm: Implement FEAT_MOPS Peter Maydell
2023-09-07 16:03 ` [PATCH 01/14] target/arm: Remove unused allocation_tag_mem() argument Peter Maydell
2023-09-08 14:12 ` Philippe Mathieu-Daudé
2023-09-07 16:03 ` [PATCH 02/14] target/arm: Don't skip MTE checks for LDRT/STRT at EL0 Peter Maydell
2023-09-08 19:53 ` Richard Henderson
2023-09-07 16:03 ` Peter Maydell [this message]
2023-09-08 14:14 ` [PATCH 03/14] target/arm: Add ID_AA64ISAR2_EL1 Philippe Mathieu-Daudé
2023-09-07 16:03 ` [PATCH 04/14] target/arm: Implement FEAT_MOPS enable bits Peter Maydell
2023-09-08 20:56 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 05/14] target/arm: Pass unpriv bool to get_a64_user_mem_index() Peter Maydell
2023-09-08 14:19 ` Philippe Mathieu-Daudé
2023-09-08 20:45 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 06/14] target/arm: Define syndrome function for MOPS exceptions Peter Maydell
2023-09-08 20:45 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 07/14] target/arm: New function allocation_tag_mem_probe() Peter Maydell
2023-09-08 20:51 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 08/14] target/arm: Implement MTE tag-checking functions for FEAT_MOPS Peter Maydell
2023-09-08 20:52 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 09/14] target/arm: Implement the SET* instructions Peter Maydell
2023-09-09 15:58 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 10/14] target/arm: Define new TB flag for ATA0 Peter Maydell
2023-09-09 16:03 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 11/14] target/arm: Implement the SETG* instructions Peter Maydell
2023-09-09 16:38 ` Richard Henderson
2023-09-11 14:17 ` Peter Maydell
2023-09-11 21:17 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 12/14] target/arm: Implement MTE tag-checking functions for FEAT_MOPS copies Peter Maydell
2023-09-09 16:42 ` Richard Henderson
2023-09-07 16:03 ` [PATCH 13/14] target/arm: Implement the CPY* instructions Peter Maydell
2023-09-09 17:06 ` Richard Henderson
2023-09-12 12:27 ` Peter Maydell
2023-09-07 16:03 ` [PATCH 14/14] target/arm: Enable FEAT_MOPS for CPU 'max' Peter Maydell
2023-09-09 16:53 ` Richard Henderson
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