From: Thomas Huth <thuth@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-s390x@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Ilya Leoshkevich" <iii@linux.ibm.com>
Subject: [risu PATCH v3 1/7] Pass siginfo_t->si_addr to the reginfo_init() function
Date: Thu, 14 Sep 2023 13:33:05 +0200 [thread overview]
Message-ID: <20230914113311.379537-2-thuth@redhat.com> (raw)
In-Reply-To: <20230914113311.379537-1-thuth@redhat.com>
On s390x, we need the si_addr from the siginfo_t to get to
the address of the illegal instruction (the PSW address in
the ucontext_t is already pointing to the next instruction
there). So let's prepare for that situation and pass the
si_addr to the reginfo_init() function everywhere.
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
risu.c | 12 ++++++------
risu.h | 2 +-
risu_reginfo_aarch64.c | 2 +-
risu_reginfo_arm.c | 2 +-
risu_reginfo_i386.c | 2 +-
risu_reginfo_loongarch64.c | 2 +-
risu_reginfo_m68k.c | 2 +-
risu_reginfo_ppc64.c | 2 +-
8 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/risu.c b/risu.c
index 714074e..36fc82a 100644
--- a/risu.c
+++ b/risu.c
@@ -106,14 +106,14 @@ static void respond(RisuResult r)
}
}
-static RisuResult send_register_info(void *uc)
+static RisuResult send_register_info(void *uc, void *siaddr)
{
uint64_t paramreg;
RisuResult res;
RisuOp op;
void *extra;
- reginfo_init(&ri[MASTER], uc);
+ reginfo_init(&ri[MASTER], uc, siaddr);
op = get_risuop(&ri[MASTER]);
/* Write a header with PC/op to keep in sync */
@@ -178,7 +178,7 @@ static void master_sigill(int sig, siginfo_t *si, void *uc)
RisuResult r;
signal_count++;
- r = send_register_info(uc);
+ r = send_register_info(uc, si->si_addr);
if (r == RES_OK) {
advance_pc(uc);
} else {
@@ -232,13 +232,13 @@ static RisuResult recv_register_info(struct reginfo *ri)
}
}
-static RisuResult recv_and_compare_register_info(void *uc)
+static RisuResult recv_and_compare_register_info(void *uc, void *siaddr)
{
uint64_t paramreg;
RisuResult res;
RisuOp op;
- reginfo_init(&ri[APPRENTICE], uc);
+ reginfo_init(&ri[APPRENTICE], uc, siaddr);
res = recv_register_info(&ri[MASTER]);
if (res != RES_OK) {
@@ -315,7 +315,7 @@ static void apprentice_sigill(int sig, siginfo_t *si, void *uc)
RisuResult r;
signal_count++;
- r = recv_and_compare_register_info(uc);
+ r = recv_and_compare_register_info(uc, si->si_addr);
if (r == RES_OK) {
advance_pc(uc);
} else {
diff --git a/risu.h b/risu.h
index bdb70c1..2c43384 100644
--- a/risu.h
+++ b/risu.h
@@ -115,7 +115,7 @@ RisuOp get_risuop(struct reginfo *ri);
uintptr_t get_pc(struct reginfo *ri);
/* initialize structure from a ucontext */
-void reginfo_init(struct reginfo *ri, ucontext_t *uc);
+void reginfo_init(struct reginfo *ri, ucontext_t *uc, void *siaddr);
/* return 1 if structs are equal, 0 otherwise. */
int reginfo_is_eq(struct reginfo *r1, struct reginfo *r2);
diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c
index be47980..1244454 100644
--- a/risu_reginfo_aarch64.c
+++ b/risu_reginfo_aarch64.c
@@ -82,7 +82,7 @@ int reginfo_size(struct reginfo *ri)
}
/* reginfo_init: initialize with a ucontext */
-void reginfo_init(struct reginfo *ri, ucontext_t *uc)
+void reginfo_init(struct reginfo *ri, ucontext_t *uc, void *siaddr)
{
int i;
struct _aarch64_ctx *ctx, *extra = NULL;
diff --git a/risu_reginfo_arm.c b/risu_reginfo_arm.c
index 202120b..85a39ac 100644
--- a/risu_reginfo_arm.c
+++ b/risu_reginfo_arm.c
@@ -118,7 +118,7 @@ static void reginfo_init_vfp(struct reginfo *ri, ucontext_t *uc)
}
}
-void reginfo_init(struct reginfo *ri, ucontext_t *uc)
+void reginfo_init(struct reginfo *ri, ucontext_t *uc, void *siaddr)
{
memset(ri, 0, sizeof(*ri)); /* necessary for memcmp later */
diff --git a/risu_reginfo_i386.c b/risu_reginfo_i386.c
index e9730be..834b2ed 100644
--- a/risu_reginfo_i386.c
+++ b/risu_reginfo_i386.c
@@ -102,7 +102,7 @@ static void *xsave_feature_buf(struct _xstate *xs, int feature)
}
/* reginfo_init: initialize with a ucontext */
-void reginfo_init(struct reginfo *ri, ucontext_t *uc)
+void reginfo_init(struct reginfo *ri, ucontext_t *uc, void *siaddr)
{
int i, nvecregs;
struct _fpstate *fp;
diff --git a/risu_reginfo_loongarch64.c b/risu_reginfo_loongarch64.c
index af6ab77..16384f1 100644
--- a/risu_reginfo_loongarch64.c
+++ b/risu_reginfo_loongarch64.c
@@ -81,7 +81,7 @@ static int parse_extcontext(struct sigcontext *sc, struct extctx_layout *extctx)
}
/* reginfo_init: initialize with a ucontext */
-void reginfo_init(struct reginfo *ri, ucontext_t *context)
+void reginfo_init(struct reginfo *ri, ucontext_t *context, void *siaddr)
{
int i;
struct ucontext *uc = (struct ucontext *)context;
diff --git a/risu_reginfo_m68k.c b/risu_reginfo_m68k.c
index 4c25e77..e29da84 100644
--- a/risu_reginfo_m68k.c
+++ b/risu_reginfo_m68k.c
@@ -33,7 +33,7 @@ int reginfo_size(struct reginfo *ri)
}
/* reginfo_init: initialize with a ucontext */
-void reginfo_init(struct reginfo *ri, ucontext_t *uc)
+void reginfo_init(struct reginfo *ri, ucontext_t *uc, void *siaddr)
{
int i;
memset(ri, 0, sizeof(*ri));
diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c
index 9899b36..bbdd63c 100644
--- a/risu_reginfo_ppc64.c
+++ b/risu_reginfo_ppc64.c
@@ -42,7 +42,7 @@ int reginfo_size(struct reginfo *ri)
}
/* reginfo_init: initialize with a ucontext */
-void reginfo_init(struct reginfo *ri, ucontext_t *uc)
+void reginfo_init(struct reginfo *ri, ucontext_t *uc, void *siaddr)
{
int i;
--
2.41.0
next prev parent reply other threads:[~2023-09-14 11:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-14 11:33 [risu PATCH v3 0/7] Add support for s390x to RISU Thomas Huth
2023-09-14 11:33 ` Thomas Huth [this message]
2023-09-14 11:33 ` [risu PATCH v3 2/7] s390x: Add basic s390x support to the C code Thomas Huth
2023-09-14 11:33 ` [risu PATCH v3 3/7] s390x: Add simple s390x.risu file Thomas Huth
2023-09-14 11:33 ` [risu PATCH v3 4/7] s390x: Add basic risugen perl module for s390x Thomas Huth
2023-09-14 11:33 ` [risu PATCH v3 5/7] s390x: Update the configure script for s390x support Thomas Huth
2023-09-14 11:33 ` [risu PATCH v3 6/7] build-all-archs: Add s390x to the script that builds all architectures Thomas Huth
2023-09-14 11:33 ` [risu RFC PATCH v3 7/7] Add a travis.yml file for testing RISU in the Travis-CI Thomas Huth
2023-09-18 12:27 ` [risu PATCH v3 0/7] Add support for s390x to RISU Peter Maydell
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