From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Greg Kurz" <groug@kaod.org>, "Anton Johansson" <anjo@rev.ng>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
qemu-ppc@nongnu.org
Subject: [RFC PATCH 3/4] accel/tcg: Guard tb_flush() with tcg_enabled() and remove the stub
Date: Thu, 14 Sep 2023 21:52:28 +0200 [thread overview]
Message-ID: <20230914195229.78244-4-philmd@linaro.org> (raw)
In-Reply-To: <20230914195229.78244-1-philmd@linaro.org>
The check on tcg_enabled() make it clearer we want
this call under TCG.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
accel/stubs/tcg-stub.c | 4 ----
cpu.c | 15 +++++++++------
gdbstub/softmmu.c | 5 ++++-
hw/ppc/spapr_hcall.c | 2 +-
4 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index dd890d6cf6..7d9846f7f2 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -14,10 +14,6 @@
#include "exec/tb-flush.h"
#include "exec/exec-all.h"
-void tb_flush(CPUState *cpu)
-{
-}
-
int probe_access_flags(CPUArchState *env, vaddr addr, int size,
MMUAccessType access_type, int mmu_idx,
bool nonfault, void **phost, uintptr_t retaddr)
diff --git a/cpu.c b/cpu.c
index 0769b0b153..ce3b04f21f 100644
--- a/cpu.c
+++ b/cpu.c
@@ -57,12 +57,15 @@ static int cpu_common_post_load(void *opaque, int version_id)
cpu->interrupt_request &= ~0x01;
tlb_flush(cpu);
- /* loadvm has just updated the content of RAM, bypassing the
- * usual mechanisms that ensure we flush TBs for writes to
- * memory we've translated code from. So we must flush all TBs,
- * which will now be stale.
- */
- tb_flush(cpu);
+ if (tcg_enabled()) {
+ /*
+ * loadvm has just updated the content of RAM, bypassing the
+ * usual mechanisms that ensure we flush TBs for writes to
+ * memory we've translated code from. So we must flush all TBs,
+ * which will now be stale.
+ */
+ tb_flush(cpu);
+ }
return 0;
}
diff --git a/gdbstub/softmmu.c b/gdbstub/softmmu.c
index 9f0b8b5497..edd13f047d 100644
--- a/gdbstub/softmmu.c
+++ b/gdbstub/softmmu.c
@@ -21,6 +21,7 @@
#include "sysemu/cpus.h"
#include "sysemu/runstate.h"
#include "sysemu/replay.h"
+#include "sysemu/tcg.h"
#include "hw/core/cpu.h"
#include "hw/cpu/cluster.h"
#include "hw/boards.h"
@@ -170,7 +171,9 @@ static void gdb_vm_state_change(void *opaque, bool running, RunState state)
} else {
trace_gdbstub_hit_break();
}
- tb_flush(cpu);
+ if (tcg_enabled()) {
+ tb_flush(cpu);
+ }
ret = GDB_SIGNAL_TRAP;
break;
case RUN_STATE_PAUSED:
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index b7dc388f2f..306f8fdf55 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -296,7 +296,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
if (flags & (H_ICACHE_SYNCHRONIZE | H_ICACHE_INVALIDATE)) {
if (kvm_enabled()) {
kvmppc_icbi_range(cpu, pdst, len);
- } else {
+ } else if (tcg_enabled()) {
tb_flush(CPU(cpu));
}
}
--
2.41.0
next prev parent reply other threads:[~2023-09-14 19:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-14 19:52 [PATCH 0/4] accel/tcg: Stubs cleanups Philippe Mathieu-Daudé
2023-09-14 19:52 ` [PATCH 1/4] accel/tcg: Remove tlb_set_dirty() stub Philippe Mathieu-Daudé
2023-09-15 14:06 ` Harsh Prateek Bora
2023-09-14 19:52 ` [PATCH 2/4] accel/tcg: Remove unused tcg_flush_jmp_cache() stub Philippe Mathieu-Daudé
2023-09-15 15:12 ` Harsh Prateek Bora
2023-09-15 15:41 ` Philippe Mathieu-Daudé
2023-09-14 19:52 ` Philippe Mathieu-Daudé [this message]
2023-09-15 15:25 ` [RFC PATCH 3/4] accel/tcg: Guard tb_flush() with tcg_enabled() and remove the stub Harsh Prateek Bora
2023-09-15 15:42 ` Philippe Mathieu-Daudé
2023-09-19 6:52 ` Harsh Prateek Bora
2023-09-14 19:52 ` [RFC PATCH 4/4] accel/tcg: Keep tlb_set_dirty() internal Philippe Mathieu-Daudé
2023-09-15 15:27 ` Harsh Prateek Bora
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