From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 37/39] util/cpuinfo-aarch64: Add CPUINFO_BTI
Date: Fri, 15 Sep 2023 20:30:09 -0700 [thread overview]
Message-ID: <20230916033011.479144-38-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230916033011.479144-1-richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
host/include/aarch64/host/cpuinfo.h | 1 +
util/cpuinfo-aarch64.c | 7 +++++++
2 files changed, 8 insertions(+)
diff --git a/host/include/aarch64/host/cpuinfo.h b/host/include/aarch64/host/cpuinfo.h
index 769626b098..a59c8418d2 100644
--- a/host/include/aarch64/host/cpuinfo.h
+++ b/host/include/aarch64/host/cpuinfo.h
@@ -10,6 +10,7 @@
#define CPUINFO_LSE (1u << 1)
#define CPUINFO_LSE2 (1u << 2)
#define CPUINFO_AES (1u << 3)
+#define CPUINFO_BTI (1u << 4)
/* Initialized with a constructor. */
extern unsigned cpuinfo;
diff --git a/util/cpuinfo-aarch64.c b/util/cpuinfo-aarch64.c
index 7d39f47e3b..e11b76491c 100644
--- a/util/cpuinfo-aarch64.c
+++ b/util/cpuinfo-aarch64.c
@@ -13,6 +13,9 @@
# include <asm/hwcap.h>
# include "elf.h"
# endif
+# ifndef HWCAP2_BTI
+# define HWCAP2_BTI 0 /* added in glibc 2.32 */
+# endif
#endif
#ifdef CONFIG_DARWIN
# include <sys/sysctl.h>
@@ -57,11 +60,15 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
info |= (hwcap & HWCAP_ATOMICS ? CPUINFO_LSE : 0);
info |= (hwcap & HWCAP_USCAT ? CPUINFO_LSE2 : 0);
info |= (hwcap & HWCAP_AES ? CPUINFO_AES: 0);
+
+ unsigned long hwcap2 = qemu_getauxval(AT_HWCAP2);
+ info |= (hwcap2 & HWCAP2_BTI ? CPUINFO_BTI : 0);
#endif
#ifdef CONFIG_DARWIN
info |= sysctl_for_bool("hw.optional.arm.FEAT_LSE") * CPUINFO_LSE;
info |= sysctl_for_bool("hw.optional.arm.FEAT_LSE2") * CPUINFO_LSE2;
info |= sysctl_for_bool("hw.optional.arm.FEAT_AES") * CPUINFO_AES;
+ info |= sysctl_for_bool("hw.optional.arm.FEAT_BTI") * CPUINFO_BTI;
#endif
cpuinfo = info;
--
2.34.1
next prev parent reply other threads:[~2023-09-16 3:38 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-16 3:29 [PULL 00/39] tcg patch queue Richard Henderson
2023-09-16 3:29 ` [PULL 01/39] accel/tcg: mttcg remove false-negative halted assertion Richard Henderson
2023-09-18 6:44 ` Nicholas Piggin
2023-09-18 7:59 ` Alex Bennée
2023-09-18 10:53 ` Nicholas Piggin
2023-09-18 12:19 ` Alex Bennée
2023-09-16 3:29 ` [PULL 02/39] accel/tcg: Fix the comment for CPUTLBEntryFull Richard Henderson
2023-09-16 3:29 ` [PULL 03/39] util: Delete checks for old host definitions Richard Henderson
2023-09-16 3:29 ` [PULL 04/39] softmmu: " Richard Henderson
2023-09-16 3:29 ` [PULL 05/39] thunk: " Richard Henderson
2023-09-16 3:29 ` [PULL 06/39] tcg/loongarch64: Import LSX instructions Richard Henderson
2023-09-16 3:29 ` [PULL 07/39] tcg/loongarch64: Lower basic tcg vec ops to LSX Richard Henderson
2023-09-16 3:29 ` [PULL 08/39] tcg: pass vece to tcg_target_const_match() Richard Henderson
2023-09-16 3:29 ` [PULL 09/39] tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt Richard Henderson
2023-09-16 3:29 ` [PULL 10/39] tcg/loongarch64: Lower add/sub_vec to vadd/vsub Richard Henderson
2023-09-16 3:29 ` [PULL 11/39] tcg/loongarch64: Lower vector bitwise operations Richard Henderson
2023-09-16 3:29 ` [PULL 12/39] tcg/loongarch64: Lower neg_vec to vneg Richard Henderson
2023-09-16 3:29 ` [PULL 13/39] tcg/loongarch64: Lower mul_vec to vmul Richard Henderson
2023-09-16 3:29 ` [PULL 14/39] tcg/loongarch64: Lower vector min max ops Richard Henderson
2023-09-16 3:29 ` [PULL 15/39] tcg/loongarch64: Lower vector saturated ops Richard Henderson
2023-09-16 3:29 ` [PULL 16/39] tcg/loongarch64: Lower vector shift vector ops Richard Henderson
2023-09-16 3:29 ` [PULL 17/39] tcg/loongarch64: Lower bitsel_vec to vbitsel Richard Henderson
2023-09-16 3:29 ` [PULL 18/39] tcg/loongarch64: Lower vector shift integer ops Richard Henderson
2023-09-16 3:29 ` [PULL 19/39] tcg/loongarch64: Lower rotv_vec ops to LSX Richard Henderson
2023-09-16 3:29 ` [PULL 20/39] tcg/loongarch64: Lower rotli_vec to vrotri Richard Henderson
2023-09-16 3:29 ` [PULL 21/39] tcg/loongarch64: Implement 128-bit load & store Richard Henderson
2023-09-16 3:29 ` [PULL 22/39] tcg: Add gvec compare with immediate and scalar operand Richard Henderson
2023-09-16 3:29 ` [PULL 23/39] target/arm: Use tcg_gen_gvec_cmpi for compare vs 0 Richard Henderson
2023-09-16 3:29 ` [PULL 24/39] accel/tcg: Simplify tlb_plugin_lookup Richard Henderson
2023-09-16 3:29 ` [PULL 25/39] accel/tcg: Split out io_prepare and io_failed Richard Henderson
2023-09-16 3:29 ` [PULL 26/39] accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed Richard Henderson
2023-09-16 3:29 ` [PULL 27/39] plugin: Simplify struct qemu_plugin_hwaddr Richard Henderson
2023-09-16 3:30 ` [PULL 28/39] accel/tcg: Merge cpu_transaction_failed into io_failed Richard Henderson
2023-09-16 3:30 ` [PULL 29/39] accel/tcg: Replace direct use of io_readx/io_writex in do_{ld, st}_1 Richard Henderson
2023-09-16 3:30 ` [PULL 30/39] accel/tcg: Merge io_readx into do_ld_mmio_beN Richard Henderson
2023-09-16 3:30 ` [PULL 31/39] accel/tcg: Merge io_writex into do_st_mmio_leN Richard Henderson
2023-09-16 3:30 ` [PULL 32/39] accel/tcg: Introduce do_ld16_mmio_beN Richard Henderson
2023-09-16 3:30 ` [PULL 33/39] accel/tcg: Introduce do_st16_mmio_leN Richard Henderson
2023-09-16 3:30 ` [PULL 34/39] fpu: Add conversions between bfloat16 and [u]int8 Richard Henderson
2023-09-16 3:30 ` [PULL 35/39] fpu: Handle m68k extended precision denormals properly Richard Henderson
2023-09-16 3:30 ` [PULL 36/39] tcg: Add tcg_out_tb_start backend hook Richard Henderson
2023-09-16 3:30 ` Richard Henderson [this message]
2023-09-16 3:30 ` [PULL 38/39] tcg/aarch64: Emit BTI insns at jump landing pads Richard Henderson
2023-09-16 3:30 ` [PULL 39/39] tcg: Map code_gen_buffer with PROT_BTI Richard Henderson
2023-09-16 4:07 ` [PULL 00/39] tcg patch queue Richard Henderson
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