From: Fan Ni <fan.ni@samsung.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: "Michael Tokarev" <mjt@tls.msk.ru>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"Michael Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"linuxarm@huawei.com" <linuxarm@huawei.com>
Subject: Re: [PATCH v2 1/4] hw/cxl: Use a switch to explicitly check size in caps_reg_read()
Date: Mon, 18 Sep 2023 16:23:09 +0000 [thread overview]
Message-ID: <20230918162309.GD3330304@sjcvldevvm72> (raw)
In-Reply-To: <20230915170418.21337-2-Jonathan.Cameron@huawei.com>
On Fri, Sep 15, 2023 at 06:04:15PM +0100, Jonathan Cameron wrote:
> Bring this read function inline with the others that do
> check for unexpected size values.
>
> Also reduces line lengths to sub 80 chars.
>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> hw/cxl/cxl-device-utils.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/hw/cxl/cxl-device-utils.c b/hw/cxl/cxl-device-utils.c
> index 517f06d869..cd0c45a2ed 100644
> --- a/hw/cxl/cxl-device-utils.c
> +++ b/hw/cxl/cxl-device-utils.c
> @@ -32,10 +32,13 @@ static uint64_t caps_reg_read(void *opaque, hwaddr offset, unsigned size)
> {
> CXLDeviceState *cxl_dstate = opaque;
>
> - if (size == 4) {
> - return cxl_dstate->caps_reg_state32[offset / sizeof(*cxl_dstate->caps_reg_state32)];
> - } else {
> - return cxl_dstate->caps_reg_state64[offset / sizeof(*cxl_dstate->caps_reg_state64)];
> + switch (size) {
> + case 4:
> + return cxl_dstate->caps_reg_state32[offset / size];
> + case 8:
> + return cxl_dstate->caps_reg_state64[offset / size];
> + default:
> + g_assert_not_reached();
> }
> }
>
> --
> 2.39.2
>
next prev parent reply other threads:[~2023-09-18 16:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-15 17:04 [PATCH v2 0/4] hw/cxl: Line length reduction and related Jonathan Cameron via
2023-09-15 17:04 ` [PATCH v2 1/4] hw/cxl: Use a switch to explicitly check size in caps_reg_read() Jonathan Cameron via
2023-09-18 16:23 ` Fan Ni [this message]
2023-09-15 17:04 ` [PATCH v2 2/4] hw/cxl: Use switch statements for read and write of cachemem registers Jonathan Cameron via
2023-09-18 16:32 ` Fan Ni
2023-09-15 17:04 ` [PATCH v2 3/4] hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExt Jonathan Cameron via
2023-09-18 16:34 ` Fan Ni
2023-09-15 17:04 ` [PATCH v2 4/4] hw/cxl: Line length reductions Jonathan Cameron via
2023-09-18 16:48 ` Fan Ni
2023-09-19 9:11 ` Jonathan Cameron via
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