[PATCH v2 0/3] hw/cxl: Misc small fixes

[PATCH v2 0/3] hw/cxl: Misc small fixes

[Jonathan Cameron via]

v2:
 - Tag collection.
 - Patch 2 discussion on appropriate license concluded that this should
   have originally only been accepted on GPL-v2 and later. However, I've
   left it as GPL-v2-only as that is what was used for other CXL files and
   for the license to be usefully relaxed we need to do them all - which
   is a job for another day.
 - Added SPDX
 - Added similar header to cxl_type3_stubs.c
 
Misc set of trivial fixes.  No conflicts with other sets outstanding
so can go with main CXL patches or perhaps via the trivial tree.

Dmitry Frolov (1):
  hw/cxl: Fix out of bound array access

Jonathan Cameron (2):
  hw/mem/cxl_type3: Add missing copyright and license notice
  docs/cxl: Cleanout some more aarch64 examples.

 docs/system/devices/cxl.rst |  4 ++--
 include/hw/cxl/cxl.h        |  2 +-
 hw/mem/cxl_type3.c          | 11 +++++++++++
 hw/mem/cxl_type3_stubs.c    | 10 ++++++++++
 4 files changed, 24 insertions(+), 3 deletions(-)

-- 
2.39.2

[PATCH v2 1/3] hw/cxl: Fix out of bound array access

[Jonathan Cameron via]

From: Dmitry Frolov <frolov@swemel.ru>

According to cxl_interleave_ways_enc(), fw->num_targets is allowed to be up
to 16. This also corresponds to CXL r3.0 spec. So, the fw->target_hbs[]
array is iterated from 0 to 15. But it is statically declared of length 8.
Thus, out of bound array access may occur.

Fixes: c28db9e000 ("hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV")
Signed-off-by: Dmitry Frolov <frolov@swemel.ru>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Link: https://lore.kernel.org/r/20230913101055.754709-1-frolov@swemel.ru
Cc: qemu-stable@nongnu.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

---
V2: Typo fix in description.
---
 include/hw/cxl/cxl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index 56c9e7676e..4944725849 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -29,7 +29,7 @@ typedef struct PXBCXLDev PXBCXLDev;
 typedef struct CXLFixedWindow {
     uint64_t size;
     char **targets;
-    PXBCXLDev *target_hbs[8];
+    PXBCXLDev *target_hbs[16];
     uint8_t num_targets;
     uint8_t enc_int_ways;
     uint8_t enc_int_gran;
-- 
2.39.2

[PATCH v2 2/3] hw/mem/cxl_type3: Add missing copyright and license notice

[Jonathan Cameron via]

This has been missing from the start. Assume it should match
with cxl/cxl-component-utils.c as both were part of early
postings from Ben.

Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

---
v2:
- Add similar to cxl_type3_stubs.c
- Add SPDX tags whilst here.
- Gathered tags.
---
 hw/mem/cxl_type3.c       | 11 +++++++++++
 hw/mem/cxl_type3_stubs.c | 10 ++++++++++
 2 files changed, 21 insertions(+)

diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index c5855d4e7d..8eb009c628 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1,3 +1,14 @@
+/*
+ * CXL Type 3 (memory expander) device
+ *
+ * Copyright(C) 2020 Intel Corporation.
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See the
+ * COPYING file in the top-level directory.
+ *
+ * SPDX-License-Identifier: GPL-v2-only
+ */
+
 #include "qemu/osdep.h"
 #include "qemu/units.h"
 #include "qemu/error-report.h"
diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c
index 56d60b4fd8..3e1851e32b 100644
--- a/hw/mem/cxl_type3_stubs.c
+++ b/hw/mem/cxl_type3_stubs.c
@@ -1,3 +1,13 @@
+/*
+ * CXL Type 3 (memory expander) device QMP stubs
+ *
+ * Copyright(C) 2020 Intel Corporation.
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See the
+ * COPYING file in the top-level directory.
+ *
+ * SPDX-License-Identifier: GPL-v2-only
+ */
 
 #include "qemu/osdep.h"
 #include "qapi/error.h"
-- 
2.39.2

Re: [PATCH v2 2/3] hw/mem/cxl_type3: Add missing copyright and license notice

[Philippe Mathieu-Daudé]

Hi Jonathan,

On 19/9/23 12:19, Jonathan Cameron wrote:
> This has been missing from the start. Assume it should match
> with cxl/cxl-component-utils.c as both were part of early
> postings from Ben.
> 
> Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>

I haven't suggested this license, I only reported these
files are missing one (so eventually, Reported-by).

> Acked-by: Dave Jiang <dave.jiang@intel.com>
> Acked-by: Ira Weiny <ira.weiny@intel.com>
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> ---
> v2:
> - Add similar to cxl_type3_stubs.c
> - Add SPDX tags whilst here.
> - Gathered tags.
> ---
>   hw/mem/cxl_type3.c       | 11 +++++++++++
>   hw/mem/cxl_type3_stubs.c | 10 ++++++++++
>   2 files changed, 21 insertions(+)
> 
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index c5855d4e7d..8eb009c628 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1,3 +1,14 @@
> +/*
> + * CXL Type 3 (memory expander) device
> + *
> + * Copyright(C) 2020 Intel Corporation.
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2. See the
> + * COPYING file in the top-level directory.
> + *
> + * SPDX-License-Identifier: GPL-v2-only

Too bad this isn't GPL-v2-or-later.

Re: [PATCH v2 2/3] hw/mem/cxl_type3: Add missing copyright and license notice

[Michael Tokarev]

20.09.2023 17:11, Philippe Mathieu-Daudé:
> Hi Jonathan,
> 
> On 19/9/23 12:19, Jonathan Cameron wrote:
>> This has been missing from the start. Assume it should match
>> with cxl/cxl-component-utils.c as both were part of early
>> postings from Ben.
>>
>> Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> 
> I haven't suggested this license, I only reported these
> files are missing one (so eventually, Reported-by).

Fixed that one.

/mjt

[PATCH v2 3/3] docs/cxl: Cleanout some more aarch64 examples.

[Jonathan Cameron via]

These crossed with the previous fix to get rid of examples
using aarch64 for which support is not yet upstream.

Reviewed-by: Fan Ni <fan.ni@samsung.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1892
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 docs/system/devices/cxl.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst
index b742120657..6ab5f72473 100644
--- a/docs/system/devices/cxl.rst
+++ b/docs/system/devices/cxl.rst
@@ -313,7 +313,7 @@ A very simple setup with just one directly attached CXL Type 3 Persistent Memory
 
 A very simple setup with just one directly attached CXL Type 3 Volatile Memory device::
 
-  qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 -cpu max \
+  qemu-system-x86_64 -M q35,cxl=on -m 4G,maxmem=8G,slots=8 -smp 4 \
   ...
   -object memory-backend-ram,id=vmem0,share=on,size=256M \
   -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
@@ -323,7 +323,7 @@ A very simple setup with just one directly attached CXL Type 3 Volatile Memory d
 
 The same volatile setup may optionally include an LSA region::
 
-  qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 -cpu max \
+  qemu-system-x86_64 -M q35,cxl=on -m 4G,maxmem=8G,slots=8 -smp 4 \
   ...
   -object memory-backend-ram,id=vmem0,share=on,size=256M \
   -object memory-backend-file,id=cxl-lsa0,share=on,mem-path=/tmp/lsa.raw,size=256M \
-- 
2.39.2

Re: [PATCH v2 0/3] hw/cxl: Misc small fixes

[Michael Tokarev]

19.09.2023 13:19, Jonathan Cameron via wrote:
> v2:
>   - Tag collection.
>   - Patch 2 discussion on appropriate license concluded that this should
>     have originally only been accepted on GPL-v2 and later. However, I've
>     left it as GPL-v2-only as that is what was used for other CXL files and
>     for the license to be usefully relaxed we need to do them all - which
>     is a job for another day.
>   - Added SPDX
>   - Added similar header to cxl_type3_stubs.c
>   
> Misc set of trivial fixes.  No conflicts with other sets outstanding
> so can go with main CXL patches or perhaps via the trivial tree.

Appied to my trivial-patches tree.  Thank you!

/mjt