From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: qemu-devel@nongnu.org
Cc: Andrew Jeffery <andrew@codeconstruct.com.au>,
clg@kaod.org, peter@pjd.dev, joel@jms.id.au, cminyard@mvista.com
Subject: [PATCH] eeprom_at24c: Model 8-bit data addressing for 16-bit devices
Date: Thu, 21 Sep 2023 13:18:16 +0930 [thread overview]
Message-ID: <20230921034816.320655-1-andrew@codeconstruct.com.au> (raw)
It appears some (many?) EEPROMs that implement 16-bit data addressing
will accept an 8-bit address and clock out non-uniform data for the
read. This behaviour is exploited by an EEPROM detection routine in part
of OpenBMC userspace with a reasonably broad user base:
https://github.com/openbmc/entity-manager/blob/0422a24bb6033605ce75479f675fedc76abb1167/src/fru_device.cpp#L197-L229
The diversity of the set of EEPROMs that it operates against is unclear,
but this code has been around for a while now.
Separately, The NVM Express Management Interface Specification dictates
the provided behaviour in section 8.2 Vital Product Data:
> If only one byte of the Command Offset is provided by the Management
> Controller, then the least significant byte of the internal offset
> shall be set to that value and the most-significant byte of the
> internal offset shall be cleared to 0h
https://nvmexpress.org/wp-content/uploads/NVM-Express-Management-Interface-Specification-1.2c-2022.10.06-Ratified.pdf
This change makes it possible to expose NVMe VPD in a manner that can be
dynamically detected by OpenBMC.
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
---
hw/nvram/eeprom_at24c.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index 613c4929e327..64a61cc0e468 100644
--- a/hw/nvram/eeprom_at24c.c
+++ b/hw/nvram/eeprom_at24c.c
@@ -98,12 +98,20 @@ uint8_t at24c_eeprom_recv(I2CSlave *s)
EEPROMState *ee = AT24C_EE(s);
uint8_t ret;
- /*
- * If got the byte address but not completely with address size
- * will return the invalid value
- */
if (ee->haveaddr > 0 && ee->haveaddr < ee->asize) {
- return 0xff;
+ /*
+ * Provide behaviour that aligns with NVMe MI 1.2c, section 8.2.
+ *
+ * https://nvmexpress.org/wp-content/uploads/NVM-Express-Management-Interface-Specification-1.2c-2022.10.06-Ratified.pdf
+ *
+ * Otherwise, the clocked-out data is meaningless anyway, and so reading
+ * off memory is as good a behaviour as anything. This also happens to
+ * help the address-width detection heuristic in OpenBMC's userspace.
+ *
+ * https://github.com/openbmc/entity-manager/blob/0422a24bb6033605ce75479f675fedc76abb1167/src/fru_device.cpp#L197-L229
+ */
+ ee->haveaddr = ee->asize;
+ ee->cur %= ee->rsize;
}
ret = ee->mem[ee->cur];
--
2.39.2
next reply other threads:[~2023-09-21 3:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-21 3:48 Andrew Jeffery [this message]
2023-10-25 9:14 ` [PATCH] eeprom_at24c: Model 8-bit data addressing for 16-bit devices Cédric Le Goater
2023-10-25 9:22 ` Klaus Jensen
2023-10-26 5:17 ` Andrew Jeffery
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