[PATCH 4/6] target/riscv/tcg: implement rva22u64 profile

[Daniel Henrique Barboza <dbarboza@ventanamicro.com>]

The TCG emulation implements all the extensions described in the
RVA22U64 profile, both mandatory and optional. The mandatory extensions
will be enabled via the profile flag. We'll leave the optional
extensions to be enabled by hand.

Given that this is the first profile we're implementing in TCG we'll
need some wiring first. 'cpu_set_profile', our set() callback for the
profile user flag that we'll expose, will do the heavy lifting. We'll
assign misa_ext and misa_ext_mask based on the profile .misa_ext, and
enable all extensions from .ext_offsets[].

We'll also update the user choice hash 'multi_ext_user_opts' for each
extension. The idea is to reflect that setting a profile is the same as
setting all extensions of the profile in the command line. This will
prevent us from mishandling those by accident during realize() time, in
particular in validate_set_extensions(), when we might enable/disable
extensions based on certain criterias.

After cpu_set_profile() is figured out then it's a matter of exposing
the user flag for the profile using the profile name (in this case,
'rva22u64') during riscv_cpu_add_user_properties().

We will expose the profile option for vendor CPUs in the next patch
since it requires special handling. Expose it to generic CPUs only for
now.

Here's an example with the 'rv64' CPU:

 $ qemu-system-riscv64 -M virt -cpu rv64,rva22u64=true (...)

 # cat /proc/cpuinfo
processor	: 0
hart		: 0
isa		: rv64imafdch_zicbom_zicboz_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zawrs_zfa_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_sstc_svadu

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 target/riscv/tcg/tcg-cpu.c | 55 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 11e34782b9..03435521c9 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -740,6 +740,57 @@ static void riscv_cpu_add_misa_properties(Object *cpu_obj)
     }
 }
 
+static void cpu_set_profile(Object *obj, Visitor *v, const char *name,
+                            void *opaque, Error **errp)
+{
+    const RISCVCPUProfile *profile = opaque;
+    RISCVCPU *cpu = RISCV_CPU(obj);
+    CPURISCVState *env = &cpu->env;
+    int i = 0;
+    bool value;
+
+    if (!visit_type_bool(v, name, &value, errp)) {
+        return;
+    }
+
+    /* We won't disable extensions if the user disables the profile */
+    if (!value) {
+        return;
+    }
+
+    env->misa_ext |= profile->misa_ext;
+    env->misa_ext_mask |= profile->misa_ext;
+
+    for (i = 0;; i++) {
+        int ext_offset = profile->ext_offsets[i];
+
+        if (ext_offset == RISCV_PROFILE_EXT_LIST_END) {
+            break;
+        }
+
+        isa_ext_update_enabled(cpu, ext_offset, true);
+        g_hash_table_insert(multi_ext_user_opts,
+                            GUINT_TO_POINTER(ext_offset),
+                            (gpointer)true);
+    }
+}
+
+static void cpu_get_profile(Object *obj, Visitor *v, const char *name,
+                            void *opaque, Error **errp)
+{
+    bool value;
+
+    visit_type_bool(v, name, &value, errp);
+}
+
+static void riscv_cpu_add_profile_prop(Object *cpu_obj,
+                                       const RISCVCPUProfile *profile)
+{
+    object_property_add(cpu_obj, profile->name, "bool",
+                        cpu_get_profile, cpu_set_profile,
+                        NULL, (void *)profile);
+}
+
 static void cpu_set_multi_ext_cfg(Object *obj, Visitor *v, const char *name,
                                   void *opaque, Error **errp)
 {
@@ -834,6 +885,10 @@ static void riscv_cpu_add_user_properties(Object *obj)
     riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_vendor_exts);
     riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_experimental_exts);
 
+    if (object_dynamic_cast(obj, TYPE_RISCV_DYNAMIC_CPU) != NULL) {
+        riscv_cpu_add_profile_prop(obj, &RVA22U64);
+    }
+
     for (Property *prop = riscv_cpu_options; prop && prop->name; prop++) {
         qdev_property_add_static(DEVICE(obj), prop);
     }
-- 
2.41.0