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From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: kbastian@mail.uni-paderborn.de,
	Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL 10/21] target/tricore: Replace cpu_*_code with translator_*
Date: Wed, 27 Sep 2023 11:35:41 +0200	[thread overview]
Message-ID: <20230927093552.493279-11-kbastian@mail.uni-paderborn.de> (raw)
In-Reply-To: <20230927093552.493279-1-kbastian@mail.uni-paderborn.de>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230828112651.522058-11-kbastian@mail.uni-paderborn.de>
---
 target/tricore/translate.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 7aba7b067c..2107d1fdd4 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -8398,7 +8398,7 @@ static bool insn_crosses_page(CPUTriCoreState *env, DisasContext *ctx)
      * 4 bytes from the page boundary, so we cross the page if the first
      * 16 bits indicate that this is a 32 bit insn.
      */
-    uint16_t insn = cpu_lduw_code(env, ctx->base.pc_next);
+    uint16_t insn = translator_lduw(env, &ctx->base, ctx->base.pc_next);
 
     return !tricore_insn_is_16bit(insn);
 }
@@ -8411,14 +8411,15 @@ static void tricore_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
     uint16_t insn_lo;
     bool is_16bit;
 
-    insn_lo = cpu_lduw_code(env, ctx->base.pc_next);
+    insn_lo = translator_lduw(env, &ctx->base, ctx->base.pc_next);
     is_16bit = tricore_insn_is_16bit(insn_lo);
     if (is_16bit) {
         ctx->opcode = insn_lo;
         ctx->pc_succ_insn = ctx->base.pc_next + 2;
         decode_16Bit_opc(ctx);
     } else {
-        uint32_t insn_hi = cpu_lduw_code(env, ctx->base.pc_next + 2);
+        uint32_t insn_hi = translator_lduw(env, &ctx->base,
+                                           ctx->base.pc_next + 2);
         ctx->opcode = insn_hi << 16 | insn_lo;
         ctx->pc_succ_insn = ctx->base.pc_next + 4;
         decode_32Bit_opc(ctx);
-- 
2.42.0



  parent reply	other threads:[~2023-09-27  9:37 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-27  9:35 [PULL 00/21] tricore queue Bastian Koppelmann
2023-09-27  9:35 ` [PULL 01/21] tests/tcg/tricore: Bump cpu to tc37x Bastian Koppelmann
2023-09-27  9:35 ` [PULL 02/21] target/tricore: Implement CRCN insn Bastian Koppelmann
2023-09-27  9:35 ` [PULL 03/21] target/tricore: Correctly handle FPU RM from PSW Bastian Koppelmann
2023-09-27  9:35 ` [PULL 04/21] target/tricore: Implement FTOU insn Bastian Koppelmann
2023-09-27  9:35 ` [PULL 05/21] target/tricore: Clarify special case for FTOUZ insn Bastian Koppelmann
2023-09-27  9:35 ` [PULL 06/21] target/tricore: Implement ftohp insn Bastian Koppelmann
2023-09-27  9:35 ` [PULL 07/21] target/tricore: Implement hptof insn Bastian Koppelmann
2023-09-27  9:35 ` [PULL 08/21] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 Bastian Koppelmann
2023-09-27  9:35 ` [PULL 09/21] target/tricore: Swap src and dst reg for RCRR_INSERT Bastian Koppelmann
2023-09-27  9:35 ` Bastian Koppelmann [this message]
2023-09-27  9:35 ` [PULL 11/21] target/tricore: Fix FTOUZ being ISA v1.3.1 up Bastian Koppelmann
2023-09-27  9:35 ` [PULL 12/21] tests/tcg/tricore: Extended and non-extened regs now match Bastian Koppelmann
2023-09-27  9:35 ` [PULL 13/21] hw/tricore: Log failing test in testdevice Bastian Koppelmann
2023-09-27  9:35 ` [PULL 14/21] tests/tcg: Reset result register after each test Bastian Koppelmann
2023-09-27  9:35 ` [PULL 15/21] tests/tcg/tricore: Add test for all arith insns up to addx Bastian Koppelmann
2023-09-27  9:35 ` [PULL 16/21] tests/tcg/tricore: Add test from 'and' to 'csub' Bastian Koppelmann
2023-09-27  9:35 ` [PULL 17/21] tests/tcg/tricore: Add test from 'dextr' to 'lt' Bastian Koppelmann
2023-09-27  9:35 ` [PULL 18/21] tests/tcg/tricore: Add test from 'max' to 'shas' Bastian Koppelmann
2023-09-27  9:35 ` [PULL 19/21] tests/tcg/tricore: Add test from 'shuffle' to 'xor.t' Bastian Koppelmann
2023-09-27  9:35 ` [PULL 20/21] target/tricore: Remove CSFRs from cpu.h Bastian Koppelmann
2023-09-27  9:35 ` [PULL 21/21] target/tricore: Change effective address (ea) to target_ulong Bastian Koppelmann
2023-09-27 17:40 ` [PULL 00/21] tricore queue Bastian Koppelmann

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