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charset=UTF-8 Content-Transfer-Encoding: 8bit X-IMT-spamd-action: no action X-PMX-Version: 6.4.9.2830568, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2023.9.29.62717, AntiVirus-Engine: 6.0.2, AntiVirus-Data: 2023.9.28.602002 X-Sophos-SenderHistory: ip=79.202.213.239, fs=162250, da=183578679, mc=44, sc=0, hc=44, sp=0, fso=162250, re=0, sd=0, hd=0 X-IMT-Source: Intern X-IMT-Spam-Score: 0.0 () X-IMT-Authenticated-Sender: uid=kbastian,ou=People,o=upb,c=de Received-SPF: pass client-ip=2001:638:502:c003::19; envelope-from=kbastian@mail.uni-paderborn.de; helo=hoth.uni-paderborn.de X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The following changes since commit 36e9aab3c569d4c9ad780473596e18479838d1aa: migration: Move return path cleanup to main migration thread (2023-09-27 13:58:02 -0400) are available in the Git repository at: https://github.com/bkoppelmann/qemu.git tags/pull-tricore-20230929 for you to fetch changes up to ceada000846b0cd81c578b1da9f76d0c59536654: target/tricore: Change effective address (ea) to target_ulong (2023-09-29 08:28:09 +0200) ---------------------------------------------------------------- - Add FTOU, CRCN, FTOHP, and HPTOF insns ---------------------------------------------------------------- Changes from v2: - Replaced %ld with PRIu64 for patch 13 - Dropped patches 15 - 19, as they require an updated patch series ---------------------------------------------------------------- Bastian Koppelmann (16): tests/tcg/tricore: Bump cpu to tc37x target/tricore: Implement CRCN insn target/tricore: Correctly handle FPU RM from PSW target/tricore: Implement FTOU insn target/tricore: Clarify special case for FTOUZ insn target/tricore: Implement ftohp insn target/tricore: Implement hptof insn target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 target/tricore: Swap src and dst reg for RCRR_INSERT target/tricore: Replace cpu_*_code with translator_* target/tricore: Fix FTOUZ being ISA v1.3.1 up tests/tcg/tricore: Extended and non-extened regs now match hw/tricore: Log failing test in testdevice tests/tcg: Reset result register after each test target/tricore: Remove CSFRs from cpu.h target/tricore: Change effective address (ea) to target_ulong hw/tricore/tricore_testdevice.c | 4 + target/tricore/cpu.h | 143 ++---------------------------- target/tricore/fpu_helper.c | 111 +++++++++++++++++++++++ target/tricore/helper.c | 19 +++- target/tricore/helper.h | 4 + target/tricore/op_helper.c | 79 +++++++++++++++-- target/tricore/translate.c | 56 +++++++++--- target/tricore/tricore-opcodes.h | 3 + tests/tcg/tricore/Makefile.softmmu-target | 6 +- tests/tcg/tricore/asm/macros.h | 65 +++++++++----- tests/tcg/tricore/asm/test_crcn.S | 9 ++ tests/tcg/tricore/asm/test_ftohp.S | 14 +++ tests/tcg/tricore/asm/test_ftou.S | 12 +++ tests/tcg/tricore/asm/test_hptof.S | 12 +++ tests/tcg/tricore/asm/test_insert.S | 14 +++ 15 files changed, 376 insertions(+), 175 deletions(-) create mode 100644 tests/tcg/tricore/asm/test_crcn.S create mode 100644 tests/tcg/tricore/asm/test_ftohp.S create mode 100644 tests/tcg/tricore/asm/test_ftou.S create mode 100644 tests/tcg/tricore/asm/test_hptof.S