From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: kbastian@mail.uni-paderborn.de,
Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL v3 11/16] target/tricore: Fix FTOUZ being ISA v1.3.1 up
Date: Fri, 29 Sep 2023 08:39:55 +0200 [thread overview]
Message-ID: <20230929064000.536923-12-kbastian@mail.uni-paderborn.de> (raw)
In-Reply-To: <20230929064000.536923-1-kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230828112651.522058-12-kbastian@mail.uni-paderborn.de>
---
target/tricore/translate.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 2107d1fdd4..7b53307eff 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -6290,7 +6290,11 @@ static void decode_rr_divide(DisasContext *ctx)
gen_helper_ftou(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
break;
case OPC2_32_RR_FTOUZ:
- gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
+ if (has_feature(ctx, TRICORE_FEATURE_131)) {
+ gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
+ } else {
+ generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC);
+ }
break;
case OPC2_32_RR_UPDFL:
gen_helper_updfl(cpu_env, cpu_gpr_d[r1]);
--
2.42.0
next prev parent reply other threads:[~2023-09-29 6:41 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-29 6:39 [PULL v3 00/16] tricore queue Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 01/16] tests/tcg/tricore: Bump cpu to tc37x Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 02/16] target/tricore: Implement CRCN insn Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 03/16] target/tricore: Correctly handle FPU RM from PSW Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 04/16] target/tricore: Implement FTOU insn Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 05/16] target/tricore: Clarify special case for FTOUZ insn Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 06/16] target/tricore: Implement ftohp insn Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 07/16] target/tricore: Implement hptof insn Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 08/16] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 09/16] target/tricore: Swap src and dst reg for RCRR_INSERT Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 10/16] target/tricore: Replace cpu_*_code with translator_* Bastian Koppelmann
2023-09-29 6:39 ` Bastian Koppelmann [this message]
2023-09-29 6:39 ` [PULL v3 12/16] tests/tcg/tricore: Extended and non-extened regs now match Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 13/16] hw/tricore: Log failing test in testdevice Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 14/16] tests/tcg: Reset result register after each test Bastian Koppelmann
2023-09-29 6:39 ` [PULL v3 15/16] target/tricore: Remove CSFRs from cpu.h Bastian Koppelmann
2023-09-29 6:40 ` [PULL v3 16/16] target/tricore: Change effective address (ea) to target_ulong Bastian Koppelmann
2023-10-02 21:56 ` [PULL v3 00/16] tricore queue Stefan Hajnoczi
2023-10-02 23:06 ` Michael Tokarev
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