From: Salil Mehta via <qemu-devel@nongnu.org>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>
Cc: <salil.mehta@huawei.com>, <maz@kernel.org>,
<jean-philippe@linaro.org>, <jonathan.cameron@huawei.com>,
<lpieralisi@kernel.org>, <peter.maydell@linaro.org>,
<richard.henderson@linaro.org>, <imammedo@redhat.com>,
<andrew.jones@linux.dev>, <david@redhat.com>, <philmd@linaro.org>,
<eric.auger@redhat.com>, <oliver.upton@linux.dev>,
<pbonzini@redhat.com>, <mst@redhat.com>, <will@kernel.org>,
<gshan@redhat.com>, <rafael@kernel.org>, <alex.bennee@linaro.org>,
<linux@armlinux.org.uk>, <darren@os.amperecomputing.com>,
<ilkka@os.amperecomputing.com>, <vishnu@os.amperecomputing.com>,
<karl.heubaum@oracle.com>, <miguel.luis@oracle.com>,
<salil.mehta@opnsrc.net>, <zhukeqian1@huawei.com>,
<wangxiongfeng2@huawei.com>, <wangyanan55@huawei.com>,
<jiakernel2@gmail.com>, <maobibo@loongson.cn>,
<lixianglai@loongson.cn>, <linuxarm@huawei.com>
Subject: [PATCH 5/9] hw/acpi: Update CPUs AML with cpu-(ctrl)dev change
Date: Fri, 29 Sep 2023 13:43:00 +0100 [thread overview]
Message-ID: <20230929124304.13672-6-salil.mehta@huawei.com> (raw)
In-Reply-To: <20230929124304.13672-1-salil.mehta@huawei.com>
CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is based on
PCI and is IO port based and hence existing cpus AML code assumes _CRS objects
would evaluate to a system resource which describes IO Port address. But on ARM
arch CPUs control device(\\_SB.PRES) register interface is memory-mapped hence
_CRS object should evaluate to system resource which describes memory-mapped
base address.
This cpus AML code change updates the existing inerface of the build cpus AML
function to accept both IO/MEMORY type regions and update the _CRS object
correspondingly.
Co-developed-by: Keqian Zhu <zhukeqian1@huawei.com>
Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
---
hw/acpi/cpu.c | 23 ++++++++++++++++-------
hw/i386/acpi-build.c | 2 +-
include/hw/acpi/cpu.h | 5 +++--
3 files changed, 20 insertions(+), 10 deletions(-)
diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c
index 45defdc0e2..66a71660ec 100644
--- a/hw/acpi/cpu.c
+++ b/hw/acpi/cpu.c
@@ -338,9 +338,10 @@ const VMStateDescription vmstate_cpu_hotplug = {
#define CPU_FW_EJECT_EVENT "CEJF"
void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
- hwaddr io_base,
+ hwaddr base_addr,
const char *res_root,
- const char *event_handler_method)
+ const char *event_handler_method,
+ AmlRegionSpace rs)
{
Aml *ifctx;
Aml *field;
@@ -367,13 +368,19 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
crs = aml_resource_template();
- aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
+ if (rs == AML_SYSTEM_IO) {
+ aml_append(crs, aml_io(AML_DECODE16, base_addr, base_addr, 1,
ACPI_CPU_HOTPLUG_REG_LEN));
+ } else {
+ aml_append(crs, aml_memory32_fixed(base_addr,
+ ACPI_CPU_HOTPLUG_REG_LEN, AML_READ_WRITE));
+ }
+
aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
/* declare CPU hotplug MMIO region with related access fields */
aml_append(cpu_ctrl_dev,
- aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
+ aml_operation_region("PRST", rs, aml_int(base_addr),
ACPI_CPU_HOTPLUG_REG_LEN));
field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
@@ -699,9 +706,11 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
aml_append(sb_scope, cpus_dev);
aml_append(table, sb_scope);
- method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
- aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
- aml_append(table, method);
+ if (event_handler_method) {
+ method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
+ aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
+ aml_append(table, method);
+ }
g_free(cphp_res_path);
}
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 4d2d40bab5..611d3d044d 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1550,7 +1550,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
.fw_unplugs_cpu = pm->smi_on_cpu_unplug,
};
build_cpus_aml(dsdt, machine, opts, pm->cpu_hp_io_base,
- "\\_SB.PCI0", "\\_GPE._E02");
+ "\\_SB.PCI0", "\\_GPE._E02", AML_SYSTEM_IO);
}
if (pcms->memhp_io_base && nr_mem) {
diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h
index 999caaf510..b87ebfdf4b 100644
--- a/include/hw/acpi/cpu.h
+++ b/include/hw/acpi/cpu.h
@@ -56,9 +56,10 @@ typedef struct CPUHotplugFeatures {
} CPUHotplugFeatures;
void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
- hwaddr io_base,
+ hwaddr base_addr,
const char *res_root,
- const char *event_handler_method);
+ const char *event_handler_method,
+ AmlRegionSpace rs);
void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list);
--
2.34.1
next prev parent reply other threads:[~2023-09-29 12:46 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-29 12:42 [PATCH 0/9] Add architecture agnostic code to support vCPU Hotplug Salil Mehta via
2023-09-29 12:42 ` [PATCH 1/9] accel/kvm: Extract common KVM vCPU {creation, parking} code Salil Mehta via
2023-09-29 13:32 ` [PATCH 1/9] accel/kvm: Extract common KVM vCPU {creation,parking} code Alex Bennée
2023-09-29 15:22 ` [PATCH 1/9] accel/kvm: Extract common KVM vCPU {creation, parking} code Salil Mehta via
2023-09-29 16:45 ` [PATCH 1/9] accel/kvm: Extract common KVM vCPU {creation,parking} code Alex Bennée
2023-09-29 12:42 ` [PATCH 2/9] hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file Salil Mehta via
2023-09-29 14:03 ` Alex Bennée
2023-09-29 15:24 ` Salil Mehta via
2023-09-29 12:42 ` [PATCH 3/9] hw/acpi: Add ACPI CPU hotplug init stub Salil Mehta via
2023-09-29 14:27 ` Alex Bennée
2023-09-29 15:47 ` Salil Mehta via
2023-10-02 6:11 ` Philippe Mathieu-Daudé
2023-09-29 12:42 ` [PATCH 4/9] hw/acpi: Init GED framework with cpu hotplug events Salil Mehta via
2023-10-02 16:06 ` Jonathan Cameron via
2023-10-02 16:06 ` Jonathan Cameron
2023-10-03 10:24 ` Salil Mehta via
2023-10-03 10:24 ` Salil Mehta
2023-09-29 12:43 ` Salil Mehta via [this message]
2023-09-29 12:43 ` [PATCH 6/9] hw/acpi: Update GED _EVT method AML with cpu scan Salil Mehta via
2023-09-29 12:43 ` [PATCH 7/9] hw/acpi: Update ACPI GED framework to support vCPU Hotplug Salil Mehta via
2023-09-29 12:43 ` [PATCH 8/9] physmem, gdbstub: Add helper functions to help *unrealize* vCPU object Salil Mehta via
2023-09-29 14:34 ` [PATCH 8/9] physmem,gdbstub: " Alex Bennée
2023-09-29 16:00 ` Salil Mehta via
2023-09-29 12:43 ` [PATCH 9/9] target/arm/kvm: Write CPU state back to KVM on reset Salil Mehta via
2023-09-29 14:39 ` Alex Bennée
2023-09-29 16:01 ` Salil Mehta via
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230929124304.13672-6-salil.mehta@huawei.com \
--to=qemu-devel@nongnu.org \
--cc=alex.bennee@linaro.org \
--cc=andrew.jones@linux.dev \
--cc=darren@os.amperecomputing.com \
--cc=david@redhat.com \
--cc=eric.auger@redhat.com \
--cc=gshan@redhat.com \
--cc=ilkka@os.amperecomputing.com \
--cc=imammedo@redhat.com \
--cc=jean-philippe@linaro.org \
--cc=jiakernel2@gmail.com \
--cc=jonathan.cameron@huawei.com \
--cc=karl.heubaum@oracle.com \
--cc=linux@armlinux.org.uk \
--cc=linuxarm@huawei.com \
--cc=lixianglai@loongson.cn \
--cc=lpieralisi@kernel.org \
--cc=maobibo@loongson.cn \
--cc=maz@kernel.org \
--cc=miguel.luis@oracle.com \
--cc=mst@redhat.com \
--cc=oliver.upton@linux.dev \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=rafael@kernel.org \
--cc=richard.henderson@linaro.org \
--cc=salil.mehta@huawei.com \
--cc=salil.mehta@opnsrc.net \
--cc=vishnu@os.amperecomputing.com \
--cc=wangxiongfeng2@huawei.com \
--cc=wangyanan55@huawei.com \
--cc=will@kernel.org \
--cc=zhukeqian1@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).