From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Anton Johansson <anjo@rev.ng>
Subject: [PULL 22/47] tcg: Remove TCGContext.tlb_fast_offset
Date: Tue, 3 Oct 2023 10:30:27 -0700 [thread overview]
Message-ID: <20231003173052.1601813-23-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231003173052.1601813-1-richard.henderson@linaro.org>
Now that there is no padding between CPUNegativeOffsetState
and CPUArchState, this value is constant across all targets.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 1 -
accel/tcg/translate-all.c | 2 --
tcg/tcg.c | 15 +++++++++------
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 3cdbeaf460..7743868dc9 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -489,7 +489,6 @@ struct TCGContext {
TCGType addr_type; /* TCG_TYPE_I32 or TCG_TYPE_I64 */
#ifdef CONFIG_SOFTMMU
- int tlb_fast_offset;
int page_mask;
uint8_t page_bits;
uint8_t tlb_dyn_max_bits;
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 6fac5b7e29..83e07b830f 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -344,8 +344,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
tcg_ctx->page_bits = TARGET_PAGE_BITS;
tcg_ctx->page_mask = TARGET_PAGE_MASK;
tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
- tcg_ctx->tlb_fast_offset = (int)offsetof(ArchCPU, parent_obj.neg.tlb.f)
- - (int)offsetof(ArchCPU, env);
#endif
tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS;
#ifdef TCG_GUEST_DEFAULT_MO
diff --git a/tcg/tcg.c b/tcg/tcg.c
index ec3f93a52f..9256217b8f 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -406,7 +406,8 @@ static uintptr_t G_GNUC_UNUSED get_jmp_target_addr(TCGContext *s, int which)
#if defined(CONFIG_SOFTMMU) && !defined(CONFIG_TCG_INTERPRETER)
static int tlb_mask_table_ofs(TCGContext *s, int which)
{
- return s->tlb_fast_offset + which * sizeof(CPUTLBDescFast);
+ return (offsetof(CPUNegativeOffsetState, tlb.f[which]) -
+ sizeof(CPUNegativeOffsetState));
}
#endif
@@ -734,6 +735,13 @@ static const TCGTargetOpDef constraint_sets[] = {
#include "tcg-target.c.inc"
+#ifndef CONFIG_TCG_INTERPRETER
+/* Validate CPUTLBDescFast placement. */
+QEMU_BUILD_BUG_ON((int)(offsetof(CPUNegativeOffsetState, tlb.f[0]) -
+ sizeof(CPUNegativeOffsetState))
+ < MIN_TLB_MASK_TABLE_OFS);
+#endif
+
static void alloc_tcg_plugin_context(TCGContext *s)
{
#ifdef CONFIG_PLUGIN
@@ -1497,11 +1505,6 @@ void tcg_func_start(TCGContext *s)
tcg_debug_assert(s->addr_type == TCG_TYPE_I32 ||
s->addr_type == TCG_TYPE_I64);
-#if defined(CONFIG_SOFTMMU) && !defined(CONFIG_TCG_INTERPRETER)
- tcg_debug_assert(s->tlb_fast_offset < 0);
- tcg_debug_assert(s->tlb_fast_offset >= MIN_TLB_MASK_TABLE_OFS);
-#endif
-
tcg_debug_assert(s->insn_start_words > 0);
}
--
2.34.1
next prev parent reply other threads:[~2023-10-03 17:42 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-03 17:30 [PULL 00/47] tcg patch queue Richard Henderson
2023-10-03 17:30 ` [PULL 01/47] accel: Rename accel_cpu_realizefn() -> accel_cpu_realize() Richard Henderson
2023-10-03 17:30 ` [PULL 02/47] accel: Rename AccelCPUClass::cpu_realizefn() -> cpu_target_realize() Richard Henderson
2023-10-03 17:30 ` [PULL 03/47] accel: Rename accel_cpu_realize() -> accel_cpu_common_realize() Richard Henderson
2023-10-03 17:30 ` [PULL 04/47] accel: Introduce accel_cpu_common_unrealize() stub Richard Henderson
2023-10-03 17:30 ` [PULL 05/47] accel: Declare AccelClass::cpu_common_[un]realize() handlers Richard Henderson
2023-10-03 17:30 ` [PULL 06/47] accel/tcg: Have tcg_exec_realizefn() return a boolean Richard Henderson
2023-10-03 17:30 ` [PULL 07/47] accel/tcg: Restrict tcg_exec_[un]realizefn() to TCG Richard Henderson
2023-10-03 17:30 ` [PULL 08/47] target/arm: Replace TARGET_PAGE_ENTRY_EXTRA Richard Henderson
2023-10-03 17:30 ` [PULL 09/47] accel/tcg: Move CPUTLB definitions from cpu-defs.h Richard Henderson
2023-10-03 17:30 ` [PULL 10/47] qom: Propagate alignment through type system Richard Henderson
2023-10-03 17:30 ` [PULL 11/47] target/arm: Remove size and alignment for cpu subclasses Richard Henderson
2023-10-03 17:30 ` [PULL 12/47] target/*: Add instance_align to all cpu base classes Richard Henderson
2023-10-03 17:30 ` [PULL 13/47] accel/tcg: Validate placement of CPUNegativeOffsetState Richard Henderson
2023-10-03 17:30 ` [PULL 14/47] accel/tcg: Move CPUNegativeOffsetState into CPUState Richard Henderson
2023-10-03 17:30 ` [PULL 15/47] accel/tcg: Remove CPUState.icount_decr_ptr Richard Henderson
2023-10-03 17:30 ` [PULL 16/47] accel/tcg: Move can_do_io to CPUNegativeOffsetState Richard Henderson
2023-10-03 17:30 ` [PULL 17/47] accel/tcg: Remove cpu_neg() Richard Henderson
2023-10-03 17:30 ` [PULL 18/47] tcg: Rename cpu_env to tcg_env Richard Henderson
2023-10-03 17:30 ` [PULL 19/47] accel/tcg: Replace CPUState.env_ptr with cpu_env() Richard Henderson
2023-10-03 17:30 ` [PULL 20/47] accel/tcg: Remove cpu_set_cpustate_pointers Richard Henderson
2023-10-03 17:30 ` [PULL 21/47] accel/tcg: Remove env_neg() Richard Henderson
2023-10-03 17:30 ` Richard Henderson [this message]
2023-10-03 17:30 ` [PULL 23/47] accel/tcg: Modify tlb_*() to use CPUState Richard Henderson
2023-10-03 17:30 ` [PULL 24/47] accel/tcg: Modify probe_access_internal() " Richard Henderson
2023-10-03 17:30 ` [PULL 25/47] accel/tcg: Modify memory access functions " Richard Henderson
2023-10-03 17:30 ` [PULL 26/47] accel/tcg: Modify atomic_mmu_lookup() " Richard Henderson
2023-10-03 17:30 ` [PULL 27/47] accel/tcg: Use CPUState in atomicity helpers Richard Henderson
2023-10-03 17:30 ` [PULL 28/47] accel/tcg: Remove env_tlb() Richard Henderson
2023-10-03 17:30 ` [PULL 29/47] accel/tcg: Unify user and softmmu do_[st|ld]*_mmu() Richard Henderson
2023-10-03 17:30 ` [PULL 30/47] accel/tcg: move ld/st helpers to ldst_common.c.inc Richard Henderson
2023-10-03 17:30 ` [PULL 31/47] exec: Make EXCP_FOO definitions target agnostic Richard Henderson
2023-10-03 17:30 ` [PULL 32/47] exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h' Richard Henderson
2023-10-03 17:30 ` [PULL 33/47] accel/tcg: Restrict dump_exec_info() declaration Richard Henderson
2023-10-03 17:30 ` [PULL 34/47] accel: Make accel-blocker.o target agnostic Richard Henderson
2023-10-03 17:30 ` [PULL 35/47] accel: Rename accel-common.c -> accel-target.c Richard Henderson
2023-10-03 17:30 ` [PULL 36/47] exec: Rename cpu.c -> cpu-target.c Richard Henderson
2023-10-03 17:30 ` [PULL 37/47] exec: Rename target specific page-vary.c -> page-vary-target.c Richard Henderson
2023-10-03 17:30 ` [PULL 38/47] accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h' Richard Henderson
2023-10-03 17:30 ` [PULL 39/47] accel/tcg: Make monitor.c a target-agnostic unit Richard Henderson
2023-10-03 17:30 ` [PULL 40/47] accel/tcg: Make icount.o a target agnostic unit Richard Henderson
2023-10-03 17:30 ` [PULL 41/47] accel/tcg: Make cpu-exec-common.c " Richard Henderson
2023-10-03 17:30 ` [PULL 42/47] tcg: Remove argument to tcg_prologue_init Richard Henderson
2023-10-03 17:30 ` [PULL 43/47] tcg: Split out tcg init functions to tcg/startup.h Richard Henderson
2023-10-03 17:30 ` [PULL 44/47] linux-user/hppa: Fix struct target_sigcontext layout Richard Henderson
2023-10-03 17:30 ` [PULL 45/47] build: Remove --enable-gprof Richard Henderson
2023-10-03 17:30 ` [PULL 46/47] tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed) Richard Henderson
2023-10-03 17:30 ` [PULL 47/47] tcg/loongarch64: Fix buid error Richard Henderson
2023-10-04 14:57 ` [PULL 00/47] tcg patch queue Stefan Hajnoczi
2023-10-04 16:28 ` Richard Henderson
2023-10-04 16:46 ` Stefan Hajnoczi
2023-10-04 17:08 ` Richard Henderson
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