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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: gaosong <gaosong@loongson.cn>
Subject: [PULL 47/47] tcg/loongarch64: Fix buid error
Date: Tue,  3 Oct 2023 10:30:52 -0700	[thread overview]
Message-ID: <20231003173052.1601813-48-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231003173052.1601813-1-richard.henderson@linaro.org>

From: gaosong <gaosong@loongson.cn>

Fix:

  In file included from ../tcg/tcg.c:735:
  /home1/gaosong/bugfix/qemu/tcg/loongarch64/tcg-target.c.inc: In function ‘tcg_out_vec_op’:
  /home1/gaosong/bugfix/qemu/tcg/loongarch64/tcg-target.c.inc:1855:9: error: a label can only be part of a statement and a declaration is not a statement
           TCGCond cond = args[3];
           ^~~~~~~

Signed-off-by: gaosong <gaosong@loongson.cn>
Message-Id: <20230926075819.3602537-1-gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/loongarch64/tcg-target.c.inc | 68 ++++++++++++++++----------------
 1 file changed, 35 insertions(+), 33 deletions(-)

diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index b701df50db..8f7091002b 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -1852,43 +1852,45 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
         tcg_out_opc_vnor_v(s, a0, a1, a1);
         break;
     case INDEX_op_cmp_vec:
-        TCGCond cond = args[3];
-        if (const_args[2]) {
-            /*
-             * cmp_vec dest, src, value
-             * Try vseqi/vslei/vslti
-             */
-            int64_t value = sextract64(a2, 0, 8 << vece);
-            if ((cond == TCG_COND_EQ || cond == TCG_COND_LE || \
-                 cond == TCG_COND_LT) && (-0x10 <= value && value <= 0x0f)) {
-                tcg_out32(s, encode_vdvjsk5_insn(cmp_vec_imm_insn[cond][vece], \
-                                                 a0, a1, value));
-                break;
-            } else if ((cond == TCG_COND_LEU || cond == TCG_COND_LTU) &&
-                (0x00 <= value && value <= 0x1f)) {
-                tcg_out32(s, encode_vdvjuk5_insn(cmp_vec_imm_insn[cond][vece], \
-                                                 a0, a1, value));
-                break;
+        {
+            TCGCond cond = args[3];
+            if (const_args[2]) {
+                /*
+                 * cmp_vec dest, src, value
+                 * Try vseqi/vslei/vslti
+                 */
+                int64_t value = sextract64(a2, 0, 8 << vece);
+                if ((cond == TCG_COND_EQ || cond == TCG_COND_LE || \
+                     cond == TCG_COND_LT) && (-0x10 <= value && value <= 0x0f)) {
+                    tcg_out32(s, encode_vdvjsk5_insn(cmp_vec_imm_insn[cond][vece], \
+                                                     a0, a1, value));
+                    break;
+                } else if ((cond == TCG_COND_LEU || cond == TCG_COND_LTU) &&
+                    (0x00 <= value && value <= 0x1f)) {
+                    tcg_out32(s, encode_vdvjuk5_insn(cmp_vec_imm_insn[cond][vece], \
+                                                     a0, a1, value));
+                    break;
+                }
+
+                /*
+                 * Fallback to:
+                 * dupi_vec temp, a2
+                 * cmp_vec a0, a1, temp, cond
+                 */
+                tcg_out_dupi_vec(s, type, vece, temp_vec, a2);
+                a2 = temp_vec;
             }
 
-            /*
-             * Fallback to:
-             * dupi_vec temp, a2
-             * cmp_vec a0, a1, temp, cond
-             */
-            tcg_out_dupi_vec(s, type, vece, temp_vec, a2);
-            a2 = temp_vec;
-        }
-
-        insn = cmp_vec_insn[cond][vece];
-        if (insn == 0) {
-            TCGArg t;
-            t = a1, a1 = a2, a2 = t;
-            cond = tcg_swap_cond(cond);
             insn = cmp_vec_insn[cond][vece];
-            tcg_debug_assert(insn != 0);
+            if (insn == 0) {
+                TCGArg t;
+                t = a1, a1 = a2, a2 = t;
+                cond = tcg_swap_cond(cond);
+                insn = cmp_vec_insn[cond][vece];
+                tcg_debug_assert(insn != 0);
+            }
+            tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
         }
-        tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2));
         break;
     case INDEX_op_add_vec:
         tcg_out_addsub_vec(s, vece, a0, a1, a2, const_args[2], true);
-- 
2.34.1



  parent reply	other threads:[~2023-10-03 17:41 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-03 17:30 [PULL 00/47] tcg patch queue Richard Henderson
2023-10-03 17:30 ` [PULL 01/47] accel: Rename accel_cpu_realizefn() -> accel_cpu_realize() Richard Henderson
2023-10-03 17:30 ` [PULL 02/47] accel: Rename AccelCPUClass::cpu_realizefn() -> cpu_target_realize() Richard Henderson
2023-10-03 17:30 ` [PULL 03/47] accel: Rename accel_cpu_realize() -> accel_cpu_common_realize() Richard Henderson
2023-10-03 17:30 ` [PULL 04/47] accel: Introduce accel_cpu_common_unrealize() stub Richard Henderson
2023-10-03 17:30 ` [PULL 05/47] accel: Declare AccelClass::cpu_common_[un]realize() handlers Richard Henderson
2023-10-03 17:30 ` [PULL 06/47] accel/tcg: Have tcg_exec_realizefn() return a boolean Richard Henderson
2023-10-03 17:30 ` [PULL 07/47] accel/tcg: Restrict tcg_exec_[un]realizefn() to TCG Richard Henderson
2023-10-03 17:30 ` [PULL 08/47] target/arm: Replace TARGET_PAGE_ENTRY_EXTRA Richard Henderson
2023-10-03 17:30 ` [PULL 09/47] accel/tcg: Move CPUTLB definitions from cpu-defs.h Richard Henderson
2023-10-03 17:30 ` [PULL 10/47] qom: Propagate alignment through type system Richard Henderson
2023-10-03 17:30 ` [PULL 11/47] target/arm: Remove size and alignment for cpu subclasses Richard Henderson
2023-10-03 17:30 ` [PULL 12/47] target/*: Add instance_align to all cpu base classes Richard Henderson
2023-10-03 17:30 ` [PULL 13/47] accel/tcg: Validate placement of CPUNegativeOffsetState Richard Henderson
2023-10-03 17:30 ` [PULL 14/47] accel/tcg: Move CPUNegativeOffsetState into CPUState Richard Henderson
2023-10-03 17:30 ` [PULL 15/47] accel/tcg: Remove CPUState.icount_decr_ptr Richard Henderson
2023-10-03 17:30 ` [PULL 16/47] accel/tcg: Move can_do_io to CPUNegativeOffsetState Richard Henderson
2023-10-03 17:30 ` [PULL 17/47] accel/tcg: Remove cpu_neg() Richard Henderson
2023-10-03 17:30 ` [PULL 18/47] tcg: Rename cpu_env to tcg_env Richard Henderson
2023-10-03 17:30 ` [PULL 19/47] accel/tcg: Replace CPUState.env_ptr with cpu_env() Richard Henderson
2023-10-03 17:30 ` [PULL 20/47] accel/tcg: Remove cpu_set_cpustate_pointers Richard Henderson
2023-10-03 17:30 ` [PULL 21/47] accel/tcg: Remove env_neg() Richard Henderson
2023-10-03 17:30 ` [PULL 22/47] tcg: Remove TCGContext.tlb_fast_offset Richard Henderson
2023-10-03 17:30 ` [PULL 23/47] accel/tcg: Modify tlb_*() to use CPUState Richard Henderson
2023-10-03 17:30 ` [PULL 24/47] accel/tcg: Modify probe_access_internal() " Richard Henderson
2023-10-03 17:30 ` [PULL 25/47] accel/tcg: Modify memory access functions " Richard Henderson
2023-10-03 17:30 ` [PULL 26/47] accel/tcg: Modify atomic_mmu_lookup() " Richard Henderson
2023-10-03 17:30 ` [PULL 27/47] accel/tcg: Use CPUState in atomicity helpers Richard Henderson
2023-10-03 17:30 ` [PULL 28/47] accel/tcg: Remove env_tlb() Richard Henderson
2023-10-03 17:30 ` [PULL 29/47] accel/tcg: Unify user and softmmu do_[st|ld]*_mmu() Richard Henderson
2023-10-03 17:30 ` [PULL 30/47] accel/tcg: move ld/st helpers to ldst_common.c.inc Richard Henderson
2023-10-03 17:30 ` [PULL 31/47] exec: Make EXCP_FOO definitions target agnostic Richard Henderson
2023-10-03 17:30 ` [PULL 32/47] exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h' Richard Henderson
2023-10-03 17:30 ` [PULL 33/47] accel/tcg: Restrict dump_exec_info() declaration Richard Henderson
2023-10-03 17:30 ` [PULL 34/47] accel: Make accel-blocker.o target agnostic Richard Henderson
2023-10-03 17:30 ` [PULL 35/47] accel: Rename accel-common.c -> accel-target.c Richard Henderson
2023-10-03 17:30 ` [PULL 36/47] exec: Rename cpu.c -> cpu-target.c Richard Henderson
2023-10-03 17:30 ` [PULL 37/47] exec: Rename target specific page-vary.c -> page-vary-target.c Richard Henderson
2023-10-03 17:30 ` [PULL 38/47] accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h' Richard Henderson
2023-10-03 17:30 ` [PULL 39/47] accel/tcg: Make monitor.c a target-agnostic unit Richard Henderson
2023-10-03 17:30 ` [PULL 40/47] accel/tcg: Make icount.o a target agnostic unit Richard Henderson
2023-10-03 17:30 ` [PULL 41/47] accel/tcg: Make cpu-exec-common.c " Richard Henderson
2023-10-03 17:30 ` [PULL 42/47] tcg: Remove argument to tcg_prologue_init Richard Henderson
2023-10-03 17:30 ` [PULL 43/47] tcg: Split out tcg init functions to tcg/startup.h Richard Henderson
2023-10-03 17:30 ` [PULL 44/47] linux-user/hppa: Fix struct target_sigcontext layout Richard Henderson
2023-10-03 17:30 ` [PULL 45/47] build: Remove --enable-gprof Richard Henderson
2023-10-03 17:30 ` [PULL 46/47] tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed) Richard Henderson
2023-10-03 17:30 ` Richard Henderson [this message]
2023-10-04 14:57 ` [PULL 00/47] tcg patch queue Stefan Hajnoczi
2023-10-04 16:28   ` Richard Henderson
2023-10-04 16:46     ` Stefan Hajnoczi
2023-10-04 17:08       ` Richard Henderson

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