From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: fei2.wu@intel.com
Subject: [PATCH v17 04/16] tcg: Record nb_spills in TCGContext
Date: Tue, 3 Oct 2023 11:30:46 -0700 [thread overview]
Message-ID: <20231003183058.1639121-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231003183058.1639121-1-richard.henderson@linaro.org>
Record the number of times a temporary is forced into memory
and the store would not have been required if there an infinite
number of call-saved cpu registers available. This excludes
stores that are required by semantics to return computed values
to their home slot in ENV, i.e. NEED_SYNC_ARG.
To be copied into TBStatistics when desired.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 1 +
tcg/tcg.c | 36 +++++++++++++++++++++++-------------
2 files changed, 24 insertions(+), 13 deletions(-)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index d60349878f..c2b1a2e187 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -567,6 +567,7 @@ struct TCGContext {
/* Used by TBStatistics */
int orig_nb_ops;
int nb_deleted_ops;
+ int nb_spills;
/* Exit to translator on overflow. */
sigjmp_buf jmp_trans;
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 60be2f429c..471e5eaad9 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1495,6 +1495,7 @@ void tcg_func_start(TCGContext *s)
s->nb_ops = 0;
s->nb_labels = 0;
s->nb_deleted_ops = 0;
+ s->nb_spills = 0;
s->current_frame_offset = s->frame_start;
#ifdef CONFIG_DEBUG_TCG
@@ -4118,8 +4119,11 @@ static inline void temp_dead(TCGContext *s, TCGTemp *ts)
is non-zero, subsequently release the temporary; if it is positive, the
temp is dead; if it is negative, the temp is free. */
static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
- TCGRegSet preferred_regs, int free_or_dead)
+ TCGRegSet preferred_regs, int free_or_dead,
+ bool account_spill)
{
+ bool did_spill = false;
+
if (!temp_readonly(ts) && !ts->mem_coherent) {
if (!ts->mem_allocated) {
temp_allocate_frame(s, ts);
@@ -4132,6 +4136,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
if (free_or_dead
&& tcg_out_sti(s, ts->type, ts->val,
ts->mem_base->reg, ts->mem_offset)) {
+ did_spill = account_spill;
break;
}
temp_load(s, ts, tcg_target_available_regs[ts->type],
@@ -4139,6 +4144,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
/* fallthrough */
case TEMP_VAL_REG:
+ did_spill = account_spill;
tcg_out_st(s, ts->type, ts->reg,
ts->mem_base->reg, ts->mem_offset);
break;
@@ -4155,6 +4161,9 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs,
if (free_or_dead) {
temp_free_or_dead(s, ts, free_or_dead);
}
+ if (did_spill) {
+ s->nb_spills += 1;
+ }
}
/* free register 'reg' by spilling the corresponding temporary if necessary */
@@ -4162,7 +4171,7 @@ static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
{
TCGTemp *ts = s->reg_to_temp[reg];
if (ts != NULL) {
- temp_sync(s, ts, allocated_regs, 0, -1);
+ temp_sync(s, ts, allocated_regs, 0, -1, true);
}
}
@@ -4442,7 +4451,8 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
ots->val = val;
ots->mem_coherent = 0;
if (NEED_SYNC_ARG(0)) {
- temp_sync(s, ots, s->reserved_regs, preferred_regs, IS_DEAD_ARG(0));
+ temp_sync(s, ots, s->reserved_regs, preferred_regs,
+ IS_DEAD_ARG(0), false);
} else if (IS_DEAD_ARG(0)) {
temp_dead(s, ots);
}
@@ -4544,7 +4554,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
ots->mem_coherent = 0;
if (NEED_SYNC_ARG(0)) {
- temp_sync(s, ots, allocated_regs, 0, 0);
+ temp_sync(s, ots, allocated_regs, 0, 0, false);
}
}
@@ -4621,7 +4631,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
break;
}
/* Sync the temp back to its slot and load from there. */
- temp_sync(s, its, s->reserved_regs, 0, 0);
+ temp_sync(s, its, s->reserved_regs, 0, 0, true);
}
/* fall through */
@@ -4652,7 +4662,7 @@ static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
temp_dead(s, its);
}
if (NEED_SYNC_ARG(0)) {
- temp_sync(s, ots, s->reserved_regs, 0, 0);
+ temp_sync(s, ots, s->reserved_regs, 0, 0, false);
}
if (IS_DEAD_ARG(0)) {
temp_dead(s, ots);
@@ -4870,7 +4880,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
* Cross register class move not supported. Sync the
* temp back to its slot and load from there.
*/
- temp_sync(s, ts, i_allocated_regs, 0, 0);
+ temp_sync(s, ts, i_allocated_regs, 0, 0, true);
tcg_out_ld(s, ts->type, reg,
ts->mem_base->reg, ts->mem_offset);
}
@@ -5019,7 +5029,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
tcg_debug_assert(!temp_readonly(ts));
if (NEED_SYNC_ARG(i)) {
- temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i));
+ temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i), false);
} else if (IS_DEAD_ARG(i)) {
temp_dead(s, ts);
}
@@ -5086,8 +5096,8 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op)
itsl == itsh + (HOST_BIG_ENDIAN ? 1 : -1)) {
TCGTemp *its = itsl - HOST_BIG_ENDIAN;
- temp_sync(s, its + 0, s->reserved_regs, 0, 0);
- temp_sync(s, its + 1, s->reserved_regs, 0, 0);
+ temp_sync(s, its + 0, s->reserved_regs, 0, 0, true);
+ temp_sync(s, its + 1, s->reserved_regs, 0, 0, true);
if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg,
its->mem_base->reg, its->mem_offset)) {
@@ -5107,7 +5117,7 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op)
temp_dead(s, itsh);
}
if (NEED_SYNC_ARG(0)) {
- temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0));
+ temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0), false);
} else if (IS_DEAD_ARG(0)) {
temp_dead(s, ots);
}
@@ -5125,7 +5135,7 @@ static void load_arg_reg(TCGContext *s, TCGReg reg, TCGTemp *ts,
* Cross register class move not supported. Sync the
* temp back to its slot and load from there.
*/
- temp_sync(s, ts, allocated_regs, 0, 0);
+ temp_sync(s, ts, allocated_regs, 0, 0, true);
tcg_out_ld(s, ts->type, reg,
ts->mem_base->reg, ts->mem_offset);
}
@@ -5307,7 +5317,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
for (i = 0; i < nb_oargs; i++) {
TCGTemp *ts = arg_temp(op->args[i]);
if (NEED_SYNC_ARG(i)) {
- temp_sync(s, ts, s->reserved_regs, 0, IS_DEAD_ARG(i));
+ temp_sync(s, ts, s->reserved_regs, 0, IS_DEAD_ARG(i), false);
} else if (IS_DEAD_ARG(i)) {
temp_dead(s, ts);
}
--
2.34.1
next prev parent reply other threads:[~2023-10-03 18:33 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-03 18:30 [PATCH v17 00/16] TCG code quality tracking Richard Henderson
2023-10-03 18:30 ` [PATCH v17 01/16] accel/tcg: Move HMP info jit and info opcount code Richard Henderson
2023-10-10 12:09 ` Philippe Mathieu-Daudé
2023-10-15 12:58 ` Alex Bennée
2023-10-03 18:30 ` [PATCH v17 02/16] tcg: Record orig_nb_ops TCGContext Richard Henderson
2023-10-15 12:57 ` Alex Bennée
2023-10-03 18:30 ` [PATCH v17 03/16] tcg: Record nb_deleted_ops in TCGContext Richard Henderson
2023-10-15 12:58 ` Alex Bennée
2023-10-03 18:30 ` Richard Henderson [this message]
2023-10-15 12:59 ` [PATCH v17 04/16] tcg: Record nb_spills " Alex Bennée
2023-10-03 18:30 ` [PATCH v17 05/16] accel/tcg: Add TBStatistics structure Richard Henderson
2023-10-16 14:38 ` Alex Bennée
2023-10-03 18:30 ` [PATCH v17 06/16] accel/tcg: Collect TB execution statistics Richard Henderson
2023-10-03 18:30 ` [PATCH v17 07/16] accel/tcg: Collect TB jit statistics Richard Henderson
2023-10-10 12:13 ` Philippe Mathieu-Daudé
2023-10-03 18:30 ` [PATCH v17 08/16] accel/tcg: Add tb_stats hmp command Richard Henderson
2023-10-03 18:30 ` [PATCH v17 09/16] util/log: Add Error argument to qemu_str_to_log_mask Richard Henderson
2023-10-10 12:55 ` Markus Armbruster
2023-10-15 18:55 ` Richard Henderson
2023-10-03 18:30 ` [PATCH v17 10/16] util/log: Add -d tb_stats Richard Henderson
2023-10-10 12:34 ` Philippe Mathieu-Daudé
2023-10-15 19:53 ` Richard Henderson
2023-10-03 18:30 ` [PATCH v17 11/16] accel/tcg: Add tb_stats_collect and tb_stats_dump Richard Henderson
2023-10-16 14:48 ` Alex Bennée
2023-10-03 18:30 ` [PATCH v17 12/16] softmmu: Export qemu_ram_ptr_length Richard Henderson
2023-10-10 12:31 ` Philippe Mathieu-Daudé
2023-10-03 18:30 ` [PATCH v17 13/16] disas: Allow monitor_disas to read from ram_addr_t Richard Henderson
2023-10-10 12:46 ` Philippe Mathieu-Daudé
2023-10-15 19:21 ` Alex Bennée
2023-10-03 18:30 ` [PATCH v17 14/16] monitor: Change MonitorDec.get_value return type to int64_t Richard Henderson
2023-10-16 14:59 ` Alex Bennée
2023-10-16 15:43 ` Alex Bennée
2023-10-03 18:30 ` [PATCH v17 15/16] accel/tcg: Add info [tb-list|tb] commands to HMP Richard Henderson
2023-10-16 15:02 ` Alex Bennée
2023-10-03 18:30 ` [PATCH v17 16/16] accel/tcg: Dump hot TBs at the end of the execution Richard Henderson
2023-10-10 12:36 ` Philippe Mathieu-Daudé
2023-10-10 13:23 ` Alex Bennée
2024-11-14 9:28 ` [PATCH v17 00/16] TCG code quality tracking Nikita Shubin
2025-01-21 10:22 ` Chinmay Rath
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231003183058.1639121-5-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=fei2.wu@intel.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).