* Re: [PATCH] target/riscv: Fix vfwmaccbf16.vf
2023-10-05 9:57 [PATCH] target/riscv: Fix vfwmaccbf16.vf Max Chou
@ 2023-10-05 10:46 ` Philippe Mathieu-Daudé
2023-10-10 11:26 ` LIU Zhiwei
2023-10-11 1:24 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-10-05 10:46 UTC (permalink / raw)
To: Max Chou, qemu-devel, qemu-riscv
Cc: Palmer Dabbelt, Alistair Francis, Bin Meng, Weiwei Li,
Daniel Henrique Barboza, Liu Zhiwei
On 5/10/23 11:57, Max Chou wrote:
> The operator (fwmacc16) of vfwmaccbf16.vf helper function should be
> replaced by fwmaccbf16.
>
Fixes: adf772b0f7 ("target/riscv: Add support for Zvfbfwma extension")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Max Chou <max.chou@sifive.com>
> ---
> target/riscv/vector_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 3fb05cc3d6e..c45d94c165c 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -3361,7 +3361,7 @@ static uint32_t fwmaccbf16(uint16_t a, uint16_t b, uint32_t d, float_status *s)
>
> RVVCALL(OPFVV3, vfwmaccbf16_vv, WOP_UUU_H, H4, H2, H2, fwmaccbf16)
> GEN_VEXT_VV_ENV(vfwmaccbf16_vv, 4)
> -RVVCALL(OPFVF3, vfwmaccbf16_vf, WOP_UUU_H, H4, H2, fwmacc16)
> +RVVCALL(OPFVF3, vfwmaccbf16_vf, WOP_UUU_H, H4, H2, fwmaccbf16)
> GEN_VEXT_VF(vfwmaccbf16_vf, 4)
>
> static uint32_t fwnmacc16(uint16_t a, uint16_t b, uint32_t d, float_status *s)
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] target/riscv: Fix vfwmaccbf16.vf
2023-10-05 9:57 [PATCH] target/riscv: Fix vfwmaccbf16.vf Max Chou
2023-10-05 10:46 ` Philippe Mathieu-Daudé
@ 2023-10-10 11:26 ` LIU Zhiwei
2023-10-11 1:24 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: LIU Zhiwei @ 2023-10-10 11:26 UTC (permalink / raw)
To: Max Chou, qemu-devel, qemu-riscv
Cc: Palmer Dabbelt, Alistair Francis, Bin Meng, Weiwei Li,
Daniel Henrique Barboza
On 2023/10/5 17:57, Max Chou wrote:
> The operator (fwmacc16) of vfwmaccbf16.vf helper function should be
> replaced by fwmaccbf16.
>
> Signed-off-by: Max Chou <max.chou@sifive.com>
> ---
> target/riscv/vector_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 3fb05cc3d6e..c45d94c165c 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -3361,7 +3361,7 @@ static uint32_t fwmaccbf16(uint16_t a, uint16_t b, uint32_t d, float_status *s)
>
> RVVCALL(OPFVV3, vfwmaccbf16_vv, WOP_UUU_H, H4, H2, H2, fwmaccbf16)
> GEN_VEXT_VV_ENV(vfwmaccbf16_vv, 4)
> -RVVCALL(OPFVF3, vfwmaccbf16_vf, WOP_UUU_H, H4, H2, fwmacc16)
> +RVVCALL(OPFVF3, vfwmaccbf16_vf, WOP_UUU_H, H4, H2, fwmaccbf16)
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Zhiwei
> GEN_VEXT_VF(vfwmaccbf16_vf, 4)
>
> static uint32_t fwnmacc16(uint16_t a, uint16_t b, uint32_t d, float_status *s)
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv: Fix vfwmaccbf16.vf
2023-10-05 9:57 [PATCH] target/riscv: Fix vfwmaccbf16.vf Max Chou
2023-10-05 10:46 ` Philippe Mathieu-Daudé
2023-10-10 11:26 ` LIU Zhiwei
@ 2023-10-11 1:24 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2023-10-11 1:24 UTC (permalink / raw)
To: Max Chou
Cc: qemu-devel, qemu-riscv, Palmer Dabbelt, Alistair Francis,
Bin Meng, Weiwei Li, Daniel Henrique Barboza, Liu Zhiwei
On Thu, Oct 5, 2023 at 8:29 PM Max Chou <max.chou@sifive.com> wrote:
>
> The operator (fwmacc16) of vfwmaccbf16.vf helper function should be
> replaced by fwmaccbf16.
>
> Signed-off-by: Max Chou <max.chou@sifive.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/vector_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index 3fb05cc3d6e..c45d94c165c 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -3361,7 +3361,7 @@ static uint32_t fwmaccbf16(uint16_t a, uint16_t b, uint32_t d, float_status *s)
>
> RVVCALL(OPFVV3, vfwmaccbf16_vv, WOP_UUU_H, H4, H2, H2, fwmaccbf16)
> GEN_VEXT_VV_ENV(vfwmaccbf16_vv, 4)
> -RVVCALL(OPFVF3, vfwmaccbf16_vf, WOP_UUU_H, H4, H2, fwmacc16)
> +RVVCALL(OPFVF3, vfwmaccbf16_vf, WOP_UUU_H, H4, H2, fwmaccbf16)
> GEN_VEXT_VF(vfwmaccbf16_vf, 4)
>
> static uint32_t fwnmacc16(uint16_t a, uint16_t b, uint32_t d, float_status *s)
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread