From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Ni Hui" <shuizhuyuanluo@126.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Marcin Nowakowski" <marcin.nowakowski@fungible.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
qemu-stable@nongnu.org,
"Sergey Evlashev" <vectorchiefrocks@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH RESEND] target/mips: Fix MSA BZ/BNZ opcodes displacement
Date: Fri, 6 Oct 2023 08:56:17 +0200 [thread overview]
Message-ID: <20231006065618.34843-1-philmd@linaro.org> (raw)
The PC offset is *signed*.
Cc: qemu-stable@nongnu.org
Reported-by: Sergey Evlashev <vectorchiefrocks@gmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1624
Fixes: c7a9ef7517 ("target/mips: Introduce decode tree bindings for MSA ASE")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/tcg/msa.decode | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/tcg/msa.decode b/target/mips/tcg/msa.decode
index 9575289195..4410e2a02e 100644
--- a/target/mips/tcg/msa.decode
+++ b/target/mips/tcg/msa.decode
@@ -31,8 +31,8 @@
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r
@ldst ...... sa:s10 ws:5 wd:5 .... df:2 &msa_i
-@bz_v ...... ... .. wt:5 sa:16 &msa_bz df=3
-@bz ...... ... df:2 wt:5 sa:16 &msa_bz
+@bz_v ...... ... .. wt:5 sa:s16 &msa_bz df=3
+@bz ...... ... df:2 wt:5 sa:s16 &msa_bz
@elm_df ...... .... ...... ws:5 wd:5 ...... &msa_elm_df df=%elm_df n=%elm_n
@elm ...... .......... ws:5 wd:5 ...... &msa_elm
@vec ...... ..... wt:5 ws:5 wd:5 ...... &msa_r df=0
--
2.41.0
reply other threads:[~2023-10-06 6:57 UTC|newest]
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