qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Chuck Zmudzinski" <brchuckz@aol.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v8 16/29] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in"
Date: Sat,  7 Oct 2023 14:38:24 +0200	[thread overview]
Message-ID: <20231007123843.127151-17-shentey@gmail.com> (raw)
In-Reply-To: <20231007123843.127151-1-shentey@gmail.com>

Rename the "isa" attribute to align it with PIIX3 for consolidation.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/isa/piix4.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 3c3c7a094c..9c8b6c98ab 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -45,7 +45,7 @@
 struct PIIX4State {
     PCIDevice dev;
     qemu_irq cpu_intr;
-    qemu_irq *isa;
+    qemu_irq *isa_irqs_in;
 
     MC146818RtcState rtc;
     PCIIDEState ide;
@@ -75,7 +75,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int level)
                 pic_level |= pci_bus_get_irq_level(bus, i);
             }
         }
-        qemu_set_irq(s->isa[pic_irq], pic_level);
+        qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level);
     }
 }
 
@@ -201,10 +201,10 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
 
     /* initialize i8259 pic */
     i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1);
-    s->isa = i8259_init(isa_bus, *i8259_out_irq);
+    s->isa_irqs_in = i8259_init(isa_bus, *i8259_out_irq);
 
     /* initialize ISA irqs */
-    isa_bus_register_input_irqs(isa_bus, s->isa);
+    isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in);
 
     /* initialize pit */
     i8254_pit_init(isa_bus, 0x40, 0, NULL);
@@ -236,7 +236,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
     if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) {
         return;
     }
-    qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]);
+    qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa_irqs_in[9]);
 
     pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS);
 }
-- 
2.42.0



  parent reply	other threads:[~2023-10-07 12:42 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-07 12:38 [PATCH v8 00/29] Consolidate PIIX south bridges Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 01/29] hw/i386/pc: Merge two if statements into one Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 02/29] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 03/29] hw/i386/pc_piix: Assign PIIX3's ISA interrupts before its realize() Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 04/29] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 05/29] hw/i386/pc_piix: Wire PIIX3's ISA interrupts by new "isa-irqs" property Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 06/29] hw/i386/pc_piix: Remove redundant "piix3" variable Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 07/29] hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in" Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 08/29] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize() Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 09/29] hw/isa/piix3: Wire PIC IRQs to ISA bus in host device Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 10/29] hw/i386/pc: Wire RTC ISA IRQs in south bridges Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 11/29] hw/isa/piix3: Create IDE controller in host device Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 12/29] hw/isa/piix3: Create USB " Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 13/29] hw/isa/piix3: Create power management " Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 14/29] hw/isa/piix3: Drop the "3" from PIIX base class name Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 15/29] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-10-07 12:38 ` Bernhard Beschow [this message]
2023-10-07 12:38 ` [PATCH v8 17/29] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 18/29] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 19/29] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 20/29] hw/isa/piix: Allow for optional PIC creation in PIIX3 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 21/29] hw/isa/piix: Allow for optional PIT " Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 22/29] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 23/29] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 24/29] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 25/29] hw/isa/piix: Rename functions to be shared for PCI interrupt triggering Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 26/29] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 27/29] hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 28/29] hw/isa/piix: Implement multi-process QEMU support also for PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 29/29] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine Bernhard Beschow
2023-10-08 17:56 ` [PATCH v8 00/29] Consolidate PIIX south bridges Chuck Zmudzinski
2023-10-11 18:57   ` Bernhard Beschow
2023-10-11 20:18     ` Michael S. Tsirkin
2023-10-12 18:13       ` Bernhard Beschow

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231007123843.127151-17-shentey@gmail.com \
    --to=shentey@gmail.com \
    --cc=aurelien@aurel32.net \
    --cc=brchuckz@aol.com \
    --cc=eduardo@habkost.net \
    --cc=hpoussin@reactos.org \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).