From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Chuck Zmudzinski" <brchuckz@aol.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v8 07/29] hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in"
Date: Sat, 7 Oct 2023 14:38:15 +0200 [thread overview]
Message-ID: <20231007123843.127151-8-shentey@gmail.com> (raw)
In-Reply-To: <20231007123843.127151-1-shentey@gmail.com>
TYPE_PIIX3_DEVICE doesn't instantiate a PIC since it relies on the board to do
so. The "pic" attribute, however, suggests that there is one. Rename the
attribute to reflect that it represents ISA interrupt lines. Use the same naming
convention as in the VIA south bridges as well as in TYPE_I82378.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
include/hw/southbridge/piix.h | 2 +-
hw/isa/piix3.c | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index bb898c6c88..b07ff6bb26 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -46,7 +46,7 @@ struct PIIXState {
#endif
uint64_t pic_levels;
- qemu_irq pic[ISA_NUM_IRQS];
+ qemu_irq isa_irqs_in[ISA_NUM_IRQS];
/* This member isn't used. Just for save/load compatibility */
int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index c17547a2c0..616f5418fa 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -36,7 +36,7 @@
static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
{
- qemu_set_irq(piix3->pic[pic_irq],
+ qemu_set_irq(piix3->isa_irqs_in[pic_irq],
!!(piix3->pic_levels &
(((1ULL << PIIX_NUM_PIRQS) - 1) <<
(pic_irq * PIIX_NUM_PIRQS))));
@@ -312,7 +312,8 @@ static void pci_piix3_init(Object *obj)
{
PIIX3State *d = PIIX3_PCI_DEVICE(obj);
- qdev_init_gpio_out_named(DEVICE(obj), d->pic, "isa-irqs", ISA_NUM_IRQS);
+ qdev_init_gpio_out_named(DEVICE(obj), d->isa_irqs_in, "isa-irqs",
+ ISA_NUM_IRQS);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
}
--
2.42.0
next prev parent reply other threads:[~2023-10-07 12:41 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-07 12:38 [PATCH v8 00/29] Consolidate PIIX south bridges Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 01/29] hw/i386/pc: Merge two if statements into one Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 02/29] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 03/29] hw/i386/pc_piix: Assign PIIX3's ISA interrupts before its realize() Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 04/29] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 05/29] hw/i386/pc_piix: Wire PIIX3's ISA interrupts by new "isa-irqs" property Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 06/29] hw/i386/pc_piix: Remove redundant "piix3" variable Bernhard Beschow
2023-10-07 12:38 ` Bernhard Beschow [this message]
2023-10-07 12:38 ` [PATCH v8 08/29] hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize() Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 09/29] hw/isa/piix3: Wire PIC IRQs to ISA bus in host device Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 10/29] hw/i386/pc: Wire RTC ISA IRQs in south bridges Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 11/29] hw/isa/piix3: Create IDE controller in host device Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 12/29] hw/isa/piix3: Create USB " Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 13/29] hw/isa/piix3: Create power management " Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 14/29] hw/isa/piix3: Drop the "3" from PIIX base class name Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 15/29] hw/isa/piix4: Remove unused inbound ISA interrupt lines Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 16/29] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in" Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 17/29] hw/isa/piix4: Rename reset control operations to match PIIX3 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 18/29] hw/isa/piix4: Reuse struct PIIXState from PIIX3 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 19/29] hw/isa/piix3: Merge hw/isa/piix4.c Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 20/29] hw/isa/piix: Allow for optional PIC creation in PIIX3 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 21/29] hw/isa/piix: Allow for optional PIT " Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 22/29] hw/isa/piix: Harmonize names of reset control memory regions Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 23/29] hw/isa/piix: Share PIIX3's base class with PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 24/29] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 25/29] hw/isa/piix: Rename functions to be shared for PCI interrupt triggering Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 26/29] hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 27/29] hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 28/29] hw/isa/piix: Implement multi-process QEMU support also for PIIX4 Bernhard Beschow
2023-10-07 12:38 ` [PATCH v8 29/29] hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine Bernhard Beschow
2023-10-08 17:56 ` [PATCH v8 00/29] Consolidate PIIX south bridges Chuck Zmudzinski
2023-10-11 18:57 ` Bernhard Beschow
2023-10-11 20:18 ` Michael S. Tsirkin
2023-10-12 18:13 ` Bernhard Beschow
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