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From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <mst@redhat.com>, <thuth@redhat.com>, <qemu-devel@nongnu.org>,
	<peter.maydell@linaro.org>, <imammedo@redhat.com>,
	<anisinha@redhat.com>, <marcel.apfelbaum@gmail.com>,
	<pbonzini@redhat.com>, <richard.henderson@linaro.org>,
	<eduardo@habkost.net>, <dan.j.williams@intel.com>,
	<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH v4] hw/cxl: Add QTG _DSM support for ACPI0017 device
Date: Mon, 9 Oct 2023 16:47:58 +0100	[thread overview]
Message-ID: <20231009164758.00001e43@Huawei.com> (raw)
In-Reply-To: <169663055629.1214042.8019806314058171125.stgit@djiang5-mobl3>

On Fri, 06 Oct 2023 15:15:56 -0700
Dave Jiang <dave.jiang@intel.com> wrote:

> Add a simple _DSM call support for the ACPI0017 device to return fake QTG
> ID values of 0 and 1 in all cases. This for _DSM plumbing testing from the OS.
> 
> Following edited for readability
> 
> Device (CXLM)
> {
>     Name (_HID, "ACPI0017")  // _HID: Hardware ID
> ...
>     Method (_DSM, 4, Serialized)  // _DSM: Device-Specific Method
>     {
>         If ((Arg0 == ToUUID ("f365f9a6-a7de-4071-a66a-b40c0b4f8e52")))
>         {
>             If ((Arg2 == Zero))
>             {
>                 Return (Buffer (One) { 0x01 })
>             }
> 
>             If ((Arg2 == One))
>             {
>                 Return (Package (0x02)
>                 {
>                     One,
>                     Package (0x02)
>                     {
>                         Zero,
>                         One
>                     }
>                 })
>             }
>         }
>     }
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> --

You've picked up my bad habit / typo.  Needs to be ---
to stop git picking up this text...

> v4: Change to package of ints rather than buffers. Also moved to 2 QTG IDs
> to improve kernel side testing. Tested on x86 qemu guest against kernel
> QTG ID _DSM parsing code to be upstreamed.
> 
> v3: Fix output assignment to be BE host friendly. Fix typo in comment.
> According to the CXL spec, the DSM output should be 1 WORD to indicate
> the max suppoted QTG ID and a package of 0 or more WORDs for the QTG IDs.
> In this dummy impementation, we have first WORD with a 1 to indcate max
> supprted QTG ID of 1. And second WORD in a package to indicate the QTG
> ID of 0.
> 
> v2: Minor edit to drop reference to switches in patch description.
> Message-Id: <20230904161847.18468-3-Jonathan.Cameron@huawei.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Given it's changed in significant way should drop these.

Anyhow, the tests also need updating.  I can do that and push out
a v5 with tests as well once I've tested.

I'm assuming need tweaked kernel code to test?

> ---
>  hw/acpi/cxl.c         |   69 +++++++++++++++++++++++++++++++++++++++++++++++++
>  hw/i386/acpi-build.c  |    1 +
>  include/hw/acpi/cxl.h |    1 +
>  3 files changed, 71 insertions(+)
> 
> diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
> index 92b46bc9323b..9cd7905ea25a 100644
> --- a/hw/acpi/cxl.c
> +++ b/hw/acpi/cxl.c
> @@ -30,6 +30,75 @@
>  #include "qapi/error.h"
>  #include "qemu/uuid.h"
>  
> +void build_cxl_dsm_method(Aml *dev)
> +{
> +    Aml *method, *ifctx, *ifctx2;
> +
> +    method = aml_method("_DSM", 4, AML_SERIALIZED);
> +    {
> +        Aml *function, *uuid;
> +
> +        uuid = aml_arg(0);
> +        function = aml_arg(2);
> +        /* CXL spec v3.0 9.17.3.1 _DSM Function for Retrieving QTG ID */
> +        ifctx = aml_if(aml_equal(
> +            uuid, aml_touuid("F365F9A6-A7DE-4071-A66A-B40C0B4F8E52")));
> +
> +        /* Function 0, standard DSM query function */
> +        ifctx2 = aml_if(aml_equal(function, aml_int(0)));
> +        {
> +            uint8_t byte_list[1] = { 0x01 }; /* function 1 only */
> +
> +            aml_append(ifctx2,
> +                       aml_return(aml_buffer(sizeof(byte_list), byte_list)));
> +        }
> +        aml_append(ifctx, ifctx2);
> +
> +        /*
> +         * Function 1
> +         * Creating a package with static values. The max supported QTG ID will
> +         * be 1 and recommended QTG IDs are 0 and then 1.
> +         * The values here are statically created to simplify emulation. Values
> +         * from a real BIOS would be determined by the performance of all the
> +         * present CXL memory and then assigned.
> +         */
> +        ifctx2 = aml_if(aml_equal(function, aml_int(1)));
> +        {
> +            Aml *pak, *pak1;
> +
> +            /*
> +             * Return: A package containing two elements - a WORD that returns
> +             * the maximum throttling group that the platform supports, and a
> +             * package containing the QTG ID(s) that the platform recommends.
> +             * Package {
> +             *     Max Supported QTG ID
> +             *     Package {QTG Recommendations}
> +             * }
> +             *
> +             * While the SPEC specified WORD that hints at the value being
> +             * 16bit, the ACPI dump of BIOS DSDT table showed that the values
> +             * are integers with no specific size specification. aml_int() will
> +             * be used for the values.
> +             */
> +            pak1 = aml_package(2);
> +            /* Set QTG ID of 0 */
> +            aml_append(pak1, aml_int(0));
> +            /* Set QTG ID of 1 */
> +            aml_append(pak1, aml_int(1));
> +
> +            pak = aml_package(2);
> +            /* Set Max QTG 1 */
> +            aml_append(pak, aml_int(1));
> +            aml_append(pak, pak1);
> +
> +            aml_append(ifctx2, aml_return(pak));
> +        }
> +        aml_append(ifctx, ifctx2);
> +    }
> +    aml_append(method, ifctx);
> +    aml_append(dev, method);
> +}
> +
>  static void cedt_build_chbs(GArray *table_data, PXBCXLDev *cxl)
>  {
>      PXBDev *pxb = PXB_DEV(cxl);
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 95199c89008a..692af40b1a75 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1422,6 +1422,7 @@ static void build_acpi0017(Aml *table)
>      method = aml_method("_STA", 0, AML_NOTSERIALIZED);
>      aml_append(method, aml_return(aml_int(0x01)));
>      aml_append(dev, method);
> +    build_cxl_dsm_method(dev);
>  
>      aml_append(scope, dev);
>      aml_append(table, scope);
> diff --git a/include/hw/acpi/cxl.h b/include/hw/acpi/cxl.h
> index acf441888683..8f22c71530d8 100644
> --- a/include/hw/acpi/cxl.h
> +++ b/include/hw/acpi/cxl.h
> @@ -25,5 +25,6 @@ void cxl_build_cedt(GArray *table_offsets, GArray *table_data,
>                      BIOSLinker *linker, const char *oem_id,
>                      const char *oem_table_id, CXLState *cxl_state);
>  void build_cxl_osc_method(Aml *dev);
> +void build_cxl_dsm_method(Aml *dev);
>  
>  #endif
> 
> 



WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <mst@redhat.com>, <thuth@redhat.com>, <qemu-devel@nongnu.org>,
	<peter.maydell@linaro.org>, <imammedo@redhat.com>,
	<anisinha@redhat.com>, <marcel.apfelbaum@gmail.com>,
	<pbonzini@redhat.com>, <richard.henderson@linaro.org>,
	<eduardo@habkost.net>, <dan.j.williams@intel.com>,
	<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH v4] hw/cxl: Add QTG _DSM support for ACPI0017 device
Date: Mon, 9 Oct 2023 16:47:58 +0100	[thread overview]
Message-ID: <20231009164758.00001e43@Huawei.com> (raw)
Message-ID: <20231009154758.qLZyizAIQkJc7jDaeR5i9bZ3G13sa8zAJceNS3n9jH0@z> (raw)
In-Reply-To: <169663055629.1214042.8019806314058171125.stgit@djiang5-mobl3>

On Fri, 06 Oct 2023 15:15:56 -0700
Dave Jiang <dave.jiang@intel.com> wrote:

> Add a simple _DSM call support for the ACPI0017 device to return fake QTG
> ID values of 0 and 1 in all cases. This for _DSM plumbing testing from the OS.
> 
> Following edited for readability
> 
> Device (CXLM)
> {
>     Name (_HID, "ACPI0017")  // _HID: Hardware ID
> ...
>     Method (_DSM, 4, Serialized)  // _DSM: Device-Specific Method
>     {
>         If ((Arg0 == ToUUID ("f365f9a6-a7de-4071-a66a-b40c0b4f8e52")))
>         {
>             If ((Arg2 == Zero))
>             {
>                 Return (Buffer (One) { 0x01 })
>             }
> 
>             If ((Arg2 == One))
>             {
>                 Return (Package (0x02)
>                 {
>                     One,
>                     Package (0x02)
>                     {
>                         Zero,
>                         One
>                     }
>                 })
>             }
>         }
>     }
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> --

You've picked up my bad habit / typo.  Needs to be ---
to stop git picking up this text...

> v4: Change to package of ints rather than buffers. Also moved to 2 QTG IDs
> to improve kernel side testing. Tested on x86 qemu guest against kernel
> QTG ID _DSM parsing code to be upstreamed.
> 
> v3: Fix output assignment to be BE host friendly. Fix typo in comment.
> According to the CXL spec, the DSM output should be 1 WORD to indicate
> the max suppoted QTG ID and a package of 0 or more WORDs for the QTG IDs.
> In this dummy impementation, we have first WORD with a 1 to indcate max
> supprted QTG ID of 1. And second WORD in a package to indicate the QTG
> ID of 0.
> 
> v2: Minor edit to drop reference to switches in patch description.
> Message-Id: <20230904161847.18468-3-Jonathan.Cameron@huawei.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Given it's changed in significant way should drop these.

Anyhow, the tests also need updating.  I can do that and push out
a v5 with tests as well once I've tested.

I'm assuming need tweaked kernel code to test?

> ---
>  hw/acpi/cxl.c         |   69 +++++++++++++++++++++++++++++++++++++++++++++++++
>  hw/i386/acpi-build.c  |    1 +
>  include/hw/acpi/cxl.h |    1 +
>  3 files changed, 71 insertions(+)
> 
> diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
> index 92b46bc9323b..9cd7905ea25a 100644
> --- a/hw/acpi/cxl.c
> +++ b/hw/acpi/cxl.c
> @@ -30,6 +30,75 @@
>  #include "qapi/error.h"
>  #include "qemu/uuid.h"
>  
> +void build_cxl_dsm_method(Aml *dev)
> +{
> +    Aml *method, *ifctx, *ifctx2;
> +
> +    method = aml_method("_DSM", 4, AML_SERIALIZED);
> +    {
> +        Aml *function, *uuid;
> +
> +        uuid = aml_arg(0);
> +        function = aml_arg(2);
> +        /* CXL spec v3.0 9.17.3.1 _DSM Function for Retrieving QTG ID */
> +        ifctx = aml_if(aml_equal(
> +            uuid, aml_touuid("F365F9A6-A7DE-4071-A66A-B40C0B4F8E52")));
> +
> +        /* Function 0, standard DSM query function */
> +        ifctx2 = aml_if(aml_equal(function, aml_int(0)));
> +        {
> +            uint8_t byte_list[1] = { 0x01 }; /* function 1 only */
> +
> +            aml_append(ifctx2,
> +                       aml_return(aml_buffer(sizeof(byte_list), byte_list)));
> +        }
> +        aml_append(ifctx, ifctx2);
> +
> +        /*
> +         * Function 1
> +         * Creating a package with static values. The max supported QTG ID will
> +         * be 1 and recommended QTG IDs are 0 and then 1.
> +         * The values here are statically created to simplify emulation. Values
> +         * from a real BIOS would be determined by the performance of all the
> +         * present CXL memory and then assigned.
> +         */
> +        ifctx2 = aml_if(aml_equal(function, aml_int(1)));
> +        {
> +            Aml *pak, *pak1;
> +
> +            /*
> +             * Return: A package containing two elements - a WORD that returns
> +             * the maximum throttling group that the platform supports, and a
> +             * package containing the QTG ID(s) that the platform recommends.
> +             * Package {
> +             *     Max Supported QTG ID
> +             *     Package {QTG Recommendations}
> +             * }
> +             *
> +             * While the SPEC specified WORD that hints at the value being
> +             * 16bit, the ACPI dump of BIOS DSDT table showed that the values
> +             * are integers with no specific size specification. aml_int() will
> +             * be used for the values.
> +             */
> +            pak1 = aml_package(2);
> +            /* Set QTG ID of 0 */
> +            aml_append(pak1, aml_int(0));
> +            /* Set QTG ID of 1 */
> +            aml_append(pak1, aml_int(1));
> +
> +            pak = aml_package(2);
> +            /* Set Max QTG 1 */
> +            aml_append(pak, aml_int(1));
> +            aml_append(pak, pak1);
> +
> +            aml_append(ifctx2, aml_return(pak));
> +        }
> +        aml_append(ifctx, ifctx2);
> +    }
> +    aml_append(method, ifctx);
> +    aml_append(dev, method);
> +}
> +
>  static void cedt_build_chbs(GArray *table_data, PXBCXLDev *cxl)
>  {
>      PXBDev *pxb = PXB_DEV(cxl);
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 95199c89008a..692af40b1a75 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1422,6 +1422,7 @@ static void build_acpi0017(Aml *table)
>      method = aml_method("_STA", 0, AML_NOTSERIALIZED);
>      aml_append(method, aml_return(aml_int(0x01)));
>      aml_append(dev, method);
> +    build_cxl_dsm_method(dev);
>  
>      aml_append(scope, dev);
>      aml_append(table, scope);
> diff --git a/include/hw/acpi/cxl.h b/include/hw/acpi/cxl.h
> index acf441888683..8f22c71530d8 100644
> --- a/include/hw/acpi/cxl.h
> +++ b/include/hw/acpi/cxl.h
> @@ -25,5 +25,6 @@ void cxl_build_cedt(GArray *table_offsets, GArray *table_data,
>                      BIOSLinker *linker, const char *oem_id,
>                      const char *oem_table_id, CXLState *cxl_state);
>  void build_cxl_osc_method(Aml *dev);
> +void build_cxl_dsm_method(Aml *dev);
>  
>  #endif
> 
> 



  reply	other threads:[~2023-10-09 15:48 UTC|newest]

Thread overview: 99+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-04  8:43 [PULL 00/63] virtio,pci: features, cleanups Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 01/63] pci: SLT must be RO Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 02/63] hw/virtio: Propagate page_mask to vhost_vdpa_listener_skipped_section() Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 03/63] hw/virtio: Propagate page_mask to vhost_vdpa_section_end() Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 04/63] hw/virtio/vhost-vdpa: Inline TARGET_PAGE_ALIGN() macro Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 05/63] hw/virtio/vhost-vdpa: Use target-agnostic qemu_target_page_mask() Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 06/63] hw/virtio: Build vhost-vdpa.o once Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 07/63] hw/virtio/meson: Rename softmmu_virtio_ss[] -> system_virtio_ss[] Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 08/63] virtio: add vhost-user-base and a generic vhost-user-device Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 09/63] hw/virtio: add config support to vhost-user-device Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 10/63] virtio-net: do not reset vlan filtering at set_features Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 11/63] virtio-net: Expose MAX_VLAN Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 12/63] vdpa: Restore vlan filtering state Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 13/63] vdpa: Allow VIRTIO_NET_F_CTRL_VLAN in SVQ Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 14/63] virtio: don't zero out memory region cache for indirect descriptors Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 15/63] vdpa: use first queue SVQ state for CVQ default Michael S. Tsirkin
2023-10-04  8:43 ` [PULL 16/63] vdpa: export vhost_vdpa_set_vring_ready Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 17/63] vdpa: rename vhost_vdpa_net_load to vhost_vdpa_net_cvq_load Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 18/63] vdpa: move vhost_vdpa_set_vring_ready to the caller Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 19/63] vdpa: remove net cvq migration blocker Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 20/63] vhost: Add count argument to vhost_svq_poll() Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 21/63] qmp: remove virtio_list, search QOM tree instead Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 22/63] qmp: update virtio feature maps, vhost-user-gpio introspection Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 23/63] vhost-user: move VhostUserProtocolFeature definition to header file Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 24/63] vhost-user: strip superfluous whitespace Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 25/63] vhost-user: tighten "reply_supported" scope in "set_vring_addr" Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 26/63] vhost-user: factor out "vhost_user_write_sync" Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 27/63] vhost-user: flatten "enforce_reply" into "vhost_user_write_sync" Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 28/63] vhost-user: hoist "write_sync", "get_features", "get_u64" Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 29/63] vhost-user: allow "vhost_set_vring" to wait for a reply Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 30/63] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously Michael S. Tsirkin
2023-10-04 10:11   ` Laszlo Ersek
2023-10-04 12:53     ` Michael S. Tsirkin
2023-10-04 13:28       ` Laszlo Ersek
2023-10-04  8:44 ` [PULL 31/63] hw/isa/ich9: Add comment on imperfect emulation of PIC vs. I/O APIC routing Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 32/63] tests/acpi: Allow update of DSDT.cxl Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 33/63] hw/cxl: Add QTG _DSM support for ACPI0017 device Michael S. Tsirkin
2023-10-04 17:46   ` Thomas Huth
2023-10-04 22:14     ` Michael S. Tsirkin
2023-10-04 23:09       ` [PATCH v3] " Dave Jiang
2023-10-05  3:36         ` Michael S. Tsirkin
2023-10-05 16:11           ` Dave Jiang
2023-10-05 16:32             ` Michael S. Tsirkin
2023-10-06 12:09               ` Jonathan Cameron via
2023-10-06 12:09                 ` Jonathan Cameron
2023-10-06 17:50                 ` Dan Williams
2023-10-06 22:15                   ` [PATCH v4] " Dave Jiang
2023-10-09 15:47                     ` Jonathan Cameron via [this message]
2023-10-09 15:47                       ` Jonathan Cameron
2023-10-09 16:06                       ` Dave Jiang
2023-10-09 15:44                   ` [PATCH v3] " Jonathan Cameron via
2023-10-09 15:44                     ` Jonathan Cameron
2023-10-07 21:17                 ` Michael S. Tsirkin
2023-10-09 15:40                   ` Jonathan Cameron via
2023-10-09 15:40                     ` Jonathan Cameron
2023-10-05 17:00             ` Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 34/63] tests/acpi: Update DSDT.cxl with QTG DSM Michael S. Tsirkin
2023-10-04  8:44 ` [PULL 35/63] hw/i386/acpi-build: Use pc_madt_cpu_entry() directly Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 36/63] hw/acpi/cpu: Have build_cpus_aml() take a build_madt_cpu_fn callback Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 37/63] hw/acpi/acpi_dev_interface: Remove now unused madt_cpu virtual method Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 38/63] hw/acpi/acpi_dev_interface: Remove now unused #include "hw/boards.h" Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 39/63] hw/i386: Remove now redundant TYPE_ACPI_GED_X86 Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 40/63] hw/i386/acpi-build: Determine SMI command port just once Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 41/63] hw/acpi: Trace GPE access in all device models, not just PIIX4 Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 42/63] hw/acpi/core: Trace enable and status registers of GPE separately Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 43/63] vdpa: fix gcc cvq_isolated uninitialized variable warning Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 44/63] vdpa net: zero vhost_vdpa iova_tree pointer at cleanup Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 45/63] hw/cxl: Push cxl_decoder_count_enc() and cxl_decode_ig() into .c Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 46/63] hw/cxl: Add utility functions decoder interleave ways and target count Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 47/63] hw/cxl: Fix and use same calculation for HDM decoder block size everywhere Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 48/63] hw/cxl: Support 4 HDM decoders at all levels of topology Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 49/63] hw/pci-bridge/cxl-upstream: Add serial number extended capability support Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 50/63] vdpa net: fix error message setting virtio status Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 51/63] vdpa net: stop probing if cannot set features Michael S. Tsirkin
2023-10-04  8:45 ` [PULL 52/63] vdpa net: follow VirtIO initialization properly at cvq isolation probing Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 53/63] amd_iommu: Fix APIC address check Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 54/63] hw/i386/pc: improve physical address space bound check for 32-bit x86 systems Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 55/63] pcie_sriov: unregister_vfs(): fix error path Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 56/63] libvhost-user.c: add assertion to vu_message_read_default Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 57/63] virtio: use shadow_avail_idx while checking number of heads Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 58/63] virtio: remove unnecessary thread fence while reading next descriptor Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 59/63] virtio: remove unused next argument from virtqueue_split_read_next_desc() Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 60/63] util/uuid: add a hash function Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 61/63] hw/display: introduce virtio-dmabuf Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 62/63] vhost-user: add shared_object msg Michael S. Tsirkin
2023-10-04  8:46 ` [PULL 63/63] libvhost-user: handle " Michael S. Tsirkin
2023-10-04  8:54 ` [PULL 00/63] virtio,pci: features, cleanups Philippe Mathieu-Daudé
2023-10-04  9:08   ` Michael S. Tsirkin
2023-10-04  8:58 ` Michael S. Tsirkin
2023-10-04 16:26 ` Michael S. Tsirkin
2023-10-04 16:50 ` Stefan Hajnoczi
2023-10-04 17:04   ` Michael S. Tsirkin
2023-10-04 17:40     ` Thomas Huth
2023-10-04 22:23       ` Michael S. Tsirkin
2023-10-05  6:10         ` Thomas Huth
2023-10-04 18:23     ` Stefan Hajnoczi
2023-10-04 17:20   ` Michael S. Tsirkin
2023-10-04 18:29     ` Stefan Hajnoczi
2023-10-04 22:16       ` Michael S. Tsirkin

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