qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "David Hildenbrand" <david@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Song Gao" <gaosong@loongson.cn>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Laurent Vivier" <lvivier@redhat.com>,
	"Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
	qemu-arm@nongnu.org, "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Ilya Leoshkevich" <iii@linux.ibm.com>,
	"Yoshinori Sato" <ysato@users.sourceforge.jp>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Weiwei Li" <liweiwei@iscas.ac.cn>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	qemu-riscv@nongnu.org,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Bin Meng" <bin.meng@windriver.com>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Marek Vasut" <marex@denx.de>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	qemu-ppc@nongnu.org, "Michael Rolnik" <mrolnik@gmail.com>,
	"Max Filippov" <jcmvbkbc@gmail.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Stafford Horne" <shorne@gmail.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Chris Wulff" <crwulff@gmail.com>,
	"Sergio Lopez" <slp@redhat.com>,
	"Xiaojuan Yang" <yangxiaojuan@loongson.cn>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Artyom Tarasenko" <atar4qemu@gmail.com>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Brian Cain" <bcain@quicinc.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	qemu-s390x@nongnu.org
Subject: [PATCH 00/18] target: Make 'cpu-qom.h' really target agnostic
Date: Tue, 10 Oct 2023 11:28:42 +0200	[thread overview]
Message-ID: <20231010092901.99189-1-philmd@linaro.org> (raw)

A heterogeneous machine must be able to instantiate CPUs
from different architectures. In order to do that, the
common hw/ code has to access to the QOM CPU definitions
from various architecture.

Those QOM definitions are published in "target/foo/cpu-qom.h".
All 'cpu-qom.h' must be target agnostic, so hw/ can include
multiple of them in order to create a heterogeneous machine.

This series strengthen all (except PPC...) target 'cpu-qom.h',
making them target agnostic.

For various targets it is just a matter of moving definitions
where they belong (either 'cpu.h' or 'cpu-qom.h').

For few (mips/riscv/sparc/x86) we have to remove the target
specific definitions (which 'taint' the header as target specific).

For mips/sparc/x86 this implies splitting the base target
definition by making it explicit to the build type (32 or 64-bit).

PPC is missing because CPU types are currently registered
indistinctly, and whether a CPU is 32/64 bit can not be detected
at build time (it is done in each cpu_class_init() handler,
*after* the type is registered).

Based-on: <20231010074952.79165-1-philmd@linaro.org>
  Introduce qtest_get_base_arch() / qtest_get_arch_bits()

Philippe Mathieu-Daudé (18):
  target: Mention 'cpu-qom.h' is target agnostic
  target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'
  target/riscv: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'
  target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'
  target/hexagon: Declare QOM definitions in 'cpu-qom.h'
  target/loongarch: Declare QOM definitions in 'cpu-qom.h'
  target/nios2: Declare QOM definitions in 'cpu-qom.h'
  target/openrisc: Declare QOM definitions in 'cpu-qom.h'
  target/i386: Inline target specific TARGET_DEFAULT_CPU_TYPE definition
  target/riscv: Inline target specific TYPE_RISCV_CPU_BASE definition
  target/i386: Declare CPU QOM types using DEFINE_TYPES() macro
  target/mips: Declare CPU QOM types using DEFINE_TYPES() macro
  target/ppc: Declare CPU QOM types using DEFINE_TYPES() macro
  target/sparc: Declare CPU QOM types using DEFINE_TYPES() macro
  cpus: Open code OBJECT_DECLARE_TYPE() in OBJECT_DECLARE_CPU_TYPE()
  target/i386: Make X86_CPU common to new I386_CPU / X86_64_CPU types
  target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types
  target/sparc: Make SPARC_CPU common to new SPARC32_CPU/SPARC64_CPU
    types

 include/hw/core/cpu.h       |  7 +++-
 target/alpha/cpu-qom.h      |  5 ++-
 target/alpha/cpu.h          |  2 --
 target/arm/cpu-qom.h        |  2 +-
 target/avr/cpu-qom.h        |  5 ++-
 target/avr/cpu.h            |  2 --
 target/cris/cpu-qom.h       |  5 ++-
 target/cris/cpu.h           |  2 --
 target/hexagon/cpu-qom.h    | 35 ++++++++++++++++++++
 target/hexagon/cpu.h        | 23 +------------
 target/hppa/cpu-qom.h       |  2 +-
 target/i386/cpu-qom.h       | 19 +++++++----
 target/i386/cpu.h           | 11 ++-----
 target/loongarch/cpu-qom.h  | 38 +++++++++++++++++++++
 target/loongarch/cpu.h      | 26 +--------------
 target/m68k/cpu-qom.h       |  5 ++-
 target/m68k/cpu.h           |  2 --
 target/microblaze/cpu-qom.h |  2 +-
 target/mips/cpu-qom.h       | 16 +++++----
 target/mips/cpu.h           |  5 +--
 target/nios2/cpu-qom.h      | 32 ++++++++++++++++++
 target/nios2/cpu.h          | 22 +------------
 target/openrisc/cpu-qom.h   | 36 ++++++++++++++++++++
 target/openrisc/cpu.h       | 26 +--------------
 target/ppc/cpu-qom.h        |  3 +-
 target/ppc/cpu.h            |  2 ++
 target/riscv/cpu-qom.h      |  9 +----
 target/riscv/cpu.h          |  2 ++
 target/rx/cpu-qom.h         |  5 ++-
 target/rx/cpu.h             |  2 --
 target/s390x/cpu-qom.h      |  5 ++-
 target/s390x/cpu.h          |  2 --
 target/sh4/cpu-qom.h        |  5 ++-
 target/sh4/cpu.h            |  2 --
 target/sparc/cpu-qom.h      | 14 ++++----
 target/sparc/cpu.h          |  5 +--
 target/tricore/cpu-qom.h    |  5 +++
 target/tricore/cpu.h        |  2 --
 target/xtensa/cpu-qom.h     |  5 ++-
 target/xtensa/cpu.h         |  2 --
 hw/i386/microvm.c           |  6 +++-
 hw/i386/pc.c                |  6 +++-
 hw/riscv/spike.c            |  8 ++++-
 hw/riscv/virt.c             |  8 ++++-
 target/i386/cpu.c           | 66 ++++++++++++++++++++++---------------
 target/mips/cpu.c           | 34 ++++++++++++-------
 target/ppc/cpu_init.c       | 52 +++++++++++++----------------
 target/sparc/cpu.c          | 35 +++++++++++++-------
 tests/qtest/cpu-plug-test.c |  2 +-
 49 files changed, 369 insertions(+), 248 deletions(-)
 create mode 100644 target/hexagon/cpu-qom.h
 create mode 100644 target/loongarch/cpu-qom.h
 create mode 100644 target/nios2/cpu-qom.h
 create mode 100644 target/openrisc/cpu-qom.h

-- 
2.41.0



             reply	other threads:[~2023-10-10  9:30 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-10  9:28 Philippe Mathieu-Daudé [this message]
2023-10-10  9:28 ` [PATCH 01/18] target: Mention 'cpu-qom.h' is target agnostic Philippe Mathieu-Daudé
2023-10-13  3:55   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 02/18] target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h' Philippe Mathieu-Daudé
2023-10-13  3:55   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 03/18] target/riscv: " Philippe Mathieu-Daudé
2023-10-10 11:36   ` LIU Zhiwei
2023-10-13  3:57   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 04/18] target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' Philippe Mathieu-Daudé
2023-10-11  2:51   ` LIU Zhiwei
2023-10-11  3:21     ` Philippe Mathieu-Daudé
2023-10-11  6:12       ` LIU Zhiwei
2023-10-13  4:02   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 05/18] target/hexagon: Declare QOM definitions " Philippe Mathieu-Daudé
2023-10-13  4:06   ` Richard Henderson
2023-10-13  9:18     ` Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 06/18] target/loongarch: " Philippe Mathieu-Daudé
2023-10-10 11:33   ` gaosong
2023-10-10  9:28 ` [PATCH 07/18] target/nios2: " Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 08/18] target/openrisc: " Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 09/18] target/i386: Inline target specific TARGET_DEFAULT_CPU_TYPE definition Philippe Mathieu-Daudé
2023-10-13  4:09   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 10/18] target/riscv: Inline target specific TYPE_RISCV_CPU_BASE definition Philippe Mathieu-Daudé
2023-10-10 11:33   ` LIU Zhiwei
2023-10-11  0:46   ` Alistair Francis
2023-10-13  4:13   ` Richard Henderson
2023-10-13 13:58     ` Philippe Mathieu-Daudé
2023-10-10  9:28 ` [PATCH 11/18] target/i386: Declare CPU QOM types using DEFINE_TYPES() macro Philippe Mathieu-Daudé
2023-10-13  4:17   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 12/18] target/mips: " Philippe Mathieu-Daudé
2023-10-13  4:18   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 13/18] target/ppc: " Philippe Mathieu-Daudé
2023-10-13  4:20   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 14/18] target/sparc: " Philippe Mathieu-Daudé
2023-10-13  4:21   ` Richard Henderson
2023-10-13 18:25   ` Mark Cave-Ayland
2023-10-10  9:28 ` [PATCH 15/18] cpus: Open code OBJECT_DECLARE_TYPE() in OBJECT_DECLARE_CPU_TYPE() Philippe Mathieu-Daudé
2023-10-13  4:27   ` Richard Henderson
2023-10-13 12:47     ` Richard Henderson
2023-10-10  9:28 ` [PATCH 16/18] target/i386: Make X86_CPU common to new I386_CPU / X86_64_CPU types Philippe Mathieu-Daudé
2023-10-13  4:31   ` Richard Henderson
2023-10-10  9:28 ` [PATCH 17/18] target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types Philippe Mathieu-Daudé
2023-10-13  4:34   ` Richard Henderson
2024-03-15 12:22     ` Philippe Mathieu-Daudé
2025-03-25 15:20       ` Philippe Mathieu-Daudé
2023-10-10  9:29 ` [PATCH 18/18] target/sparc: Make SPARC_CPU common to new SPARC32_CPU/SPARC64_CPU types Philippe Mathieu-Daudé
2023-10-13 18:28   ` Mark Cave-Ayland

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231010092901.99189-1-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=aleksandar.rikalo@syrmia.com \
    --cc=alistair.francis@wdc.com \
    --cc=atar4qemu@gmail.com \
    --cc=aurelien@aurel32.net \
    --cc=bcain@quicinc.com \
    --cc=bin.meng@windriver.com \
    --cc=clg@kaod.org \
    --cc=crwulff@gmail.com \
    --cc=danielhb413@gmail.com \
    --cc=david@redhat.com \
    --cc=dbarboza@ventanamicro.com \
    --cc=edgar.iglesias@gmail.com \
    --cc=eduardo@habkost.net \
    --cc=gaosong@loongson.cn \
    --cc=iii@linux.ibm.com \
    --cc=jcmvbkbc@gmail.com \
    --cc=jiaxun.yang@flygoat.com \
    --cc=kbastian@mail.uni-paderborn.de \
    --cc=laurent@vivier.eu \
    --cc=liweiwei@iscas.ac.cn \
    --cc=lvivier@redhat.com \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=marex@denx.de \
    --cc=mark.cave-ayland@ilande.co.uk \
    --cc=mrolnik@gmail.com \
    --cc=mst@redhat.com \
    --cc=npiggin@gmail.com \
    --cc=palmer@dabbelt.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=qemu-s390x@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=shorne@gmail.com \
    --cc=slp@redhat.com \
    --cc=thuth@redhat.com \
    --cc=wangyanan55@huawei.com \
    --cc=yangxiaojuan@loongson.cn \
    --cc=ysato@users.sourceforge.jp \
    --cc=zhiwei_liu@linux.alibaba.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).