[PULL 0/7] loongarch-to-apply queue

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit 63011373ad22c794a013da69663c03f1297a5c56:

  Merge tag 'pull-riscv-to-apply-20231012-1' of https://github.com/alistair23/qemu into staging (2023-10-12 10:24:44 -0400)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231013

for you to fetch changes up to 1bea6930ca7b9587ea8d8fbb77069b6a13aa031a:

  LoongArch: step down as general arch maintainer (2023-10-13 10:05:32 +0800)

----------------------------------------------------------------
pull-loongarch-20231013

*Fix ASXE flag conflict
*Add preldx instruction
*Add preldx instruction
*Remove unused region
*Xiao juan step down as general arch maintainer

----------------------------------------------------------------
Jiajie Chen (1):
      target/loongarch: fix ASXE flag conflict

Philippe Mathieu-Daudé (2):
      hw/loongarch/virt: Remove unused ISA UART
      hw/loongarch/virt: Remove unused ISA Bus

Song Gao (2):
      target/loongarch: Add preldx instruction
      hw/loongarch/virt: Remove unused 'loongarch_virt_pm' region

Thomas Weißschuh (1):
      hw/loongarch: remove global loaderparams variable

Xiaojuan Yang (1):
      LoongArch: step down as general arch maintainer

 MAINTAINERS                                    |   2 -
 hw/loongarch/Kconfig                           |   2 -
 hw/loongarch/virt.c                            | 103 +++++++------------------
 include/hw/loongarch/virt.h                    |   3 -
 target/loongarch/cpu.h                         |   4 +-
 target/loongarch/disas.c                       |   7 ++
 target/loongarch/insn_trans/trans_memory.c.inc |   5 ++
 target/loongarch/insns.decode                  |   3 +
 tests/tcg/loongarch64/system/boot.S            |   7 +-
 9 files changed, 49 insertions(+), 87 deletions(-)

[PULL 1/7] target/loongarch: fix ASXE flag conflict

[Song Gao]

From: Jiajie Chen <c@jia.je>

HW_FLAGS_EUEN_ASXE acccidentally conflicts with HW_FLAGS_CRMD_PG,
enabling LASX instructions even when CSR_EUEN.ASXE=0.

Closes: https://gitlab.com/qemu-project/qemu/-/issues/1907
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230930112837.1871691-1-c@jia.je>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 40e70a8119..8b54cf109c 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -458,11 +458,11 @@ static inline void set_pc(CPULoongArchState *env, uint64_t value)
  * LoongArch CPUs hardware flags.
  */
 #define HW_FLAGS_PLV_MASK   R_CSR_CRMD_PLV_MASK  /* 0x03 */
-#define HW_FLAGS_CRMD_PG    R_CSR_CRMD_PG_MASK   /* 0x10 */
 #define HW_FLAGS_EUEN_FPE   0x04
 #define HW_FLAGS_EUEN_SXE   0x08
-#define HW_FLAGS_EUEN_ASXE  0x10
+#define HW_FLAGS_CRMD_PG    R_CSR_CRMD_PG_MASK   /* 0x10 */
 #define HW_FLAGS_VA32       0x20
+#define HW_FLAGS_EUEN_ASXE  0x40
 
 static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
                                         uint64_t *cs_base, uint32_t *flags)
-- 
2.25.1

[PULL 2/7] target/loongarch: Add preldx instruction

[Song Gao]

Resolve the issue of starting the Loongnix 20.5[1] system failure.

Logs:
    Loading Linux 4.19.0-19-loongson-3 ...
    Loading initial ramdisk ...
    PROGRESS CODE: V02010004 I0
    PROGRESS CODE: V03101019 I0
    Error: unknown opcode. 90000000003a3e6c: 0x382c6d82

[1] http://pkg.loongnix.cn/loongnix/isos/Loongnix-20.5/Loongnix-20.5.cartoon.gui.loongarch64.en.qcow2

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230905123910.3052023-1-gaosong@loongson.cn>
---
 target/loongarch/disas.c                       | 7 +++++++
 target/loongarch/insn_trans/trans_memory.c.inc | 5 +++++
 target/loongarch/insns.decode                  | 3 +++
 3 files changed, 15 insertions(+)

diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index c8a29eac2b..2040f3e44d 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -190,6 +190,12 @@ static void output_hint_r_i(DisasContext *ctx, arg_hint_r_i *a,
     output(ctx, mnemonic, "%d, r%d, %d", a->hint, a->rj, a->imm);
 }
 
+static void output_hint_rr(DisasContext *ctx, arg_hint_rr *a,
+                           const char *mnemonic)
+{
+    output(ctx, mnemonic, "%d, r%d, r%d", a->hint, a->rj, a->rk);
+}
+
 static void output_i(DisasContext *ctx, arg_i *a, const char *mnemonic)
 {
     output(ctx, mnemonic, "%d", a->imm);
@@ -549,6 +555,7 @@ INSN(ld_bu,        rr_i)
 INSN(ld_hu,        rr_i)
 INSN(ld_wu,        rr_i)
 INSN(preld,        hint_r_i)
+INSN(preldx,       hint_rr)
 INSN(fld_s,        fr_i)
 INSN(fst_s,        fr_i)
 INSN(fld_d,        fr_i)
diff --git a/target/loongarch/insn_trans/trans_memory.c.inc b/target/loongarch/insn_trans/trans_memory.c.inc
index c3de1404ea..42f4e74012 100644
--- a/target/loongarch/insn_trans/trans_memory.c.inc
+++ b/target/loongarch/insn_trans/trans_memory.c.inc
@@ -110,6 +110,11 @@ static bool trans_preld(DisasContext *ctx, arg_preld *a)
     return true;
 }
 
+static bool trans_preldx(DisasContext *ctx, arg_preldx * a)
+{
+    return true;
+}
+
 static bool trans_dbar(DisasContext *ctx, arg_dbar * a)
 {
     tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index 64b308f9fb..62f58cc541 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -24,6 +24,7 @@
 &rrr          rd rj rk
 &rr_i         rd rj imm
 &hint_r_i     hint rj imm
+&hint_rr      hint rj rk
 &rrr_sa       rd rj rk sa
 &rr_ms_ls     rd rj ms ls
 &ff           fd fj
@@ -69,6 +70,7 @@
 @rr_i16                     .... .. imm:s16 rj:5 rd:5    &rr_i
 @rr_i16s2         .... ..  ................ rj:5 rd:5    &rr_i imm=%offs16
 @hint_r_i12           .... ...... imm:s12 rj:5 hint:5    &hint_r_i
+@hint_rr         .... ........ ..... rk:5 rj:5 hint:5    &hint_rr
 @rrr_sa2p1        .... ........ ... .. rk:5 rj:5 rd:5    &rrr_sa  sa=%sa2p1
 @rrr_sa2        .... ........ ... sa:2 rk:5 rj:5 rd:5    &rrr_sa
 @rrr_sa3         .... ........ .. sa:3 rk:5 rj:5 rd:5    &rrr_sa
@@ -228,6 +230,7 @@ ldx_bu          0011 10000010 00000 ..... ..... .....    @rrr
 ldx_hu          0011 10000010 01000 ..... ..... .....    @rrr
 ldx_wu          0011 10000010 10000 ..... ..... .....    @rrr
 preld           0010 101011 ............ ..... .....     @hint_r_i12
+preldx          0011 10000010 11000 ..... ..... .....    @hint_rr
 dbar            0011 10000111 00100 ...............      @i15
 ibar            0011 10000111 00101 ...............      @i15
 ldptr_w         0010 0100 .............. ..... .....     @rr_i14s2
-- 
2.25.1

[PULL 3/7] hw/loongarch: remove global loaderparams variable

[Song Gao]

From: Thomas Weißschuh <thomas@t-8ch.de>

Passing the struct around explicitly makes the control-flow more
obvious.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de>
Message-Id: <20231010-loongarch-loader-params-v2-1-512cc7959683@t-8ch.de>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c | 50 ++++++++++++++++++++++++---------------------
 1 file changed, 27 insertions(+), 23 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index b0a004f860..c6f64e941b 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -47,6 +47,13 @@
 #include "qemu/error-report.h"
 
 
+struct loaderparams {
+    uint64_t ram_size;
+    const char *kernel_filename;
+    const char *kernel_cmdline;
+    const char *initrd_filename;
+};
+
 static void virt_flash_create(LoongArchMachineState *lams)
 {
     DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
@@ -411,24 +418,17 @@ static const MemoryRegionOps loongarch_virt_pm_ops = {
     }
 };
 
-static struct _loaderparams {
-    uint64_t ram_size;
-    const char *kernel_filename;
-    const char *kernel_cmdline;
-    const char *initrd_filename;
-} loaderparams;
-
 static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 {
     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
 }
 
-static int64_t load_kernel_info(void)
+static int64_t load_kernel_info(const struct loaderparams *loaderparams)
 {
     uint64_t kernel_entry, kernel_low, kernel_high;
     ssize_t kernel_size;
 
-    kernel_size = load_elf(loaderparams.kernel_filename, NULL,
+    kernel_size = load_elf(loaderparams->kernel_filename, NULL,
                            cpu_loongarch_virt_to_phys, NULL,
                            &kernel_entry, &kernel_low,
                            &kernel_high, NULL, 0,
@@ -436,7 +436,7 @@ static int64_t load_kernel_info(void)
 
     if (kernel_size < 0) {
         error_report("could not load kernel '%s': %s",
-                     loaderparams.kernel_filename,
+                     loaderparams->kernel_filename,
                      load_elf_strerror(kernel_size));
         exit(1);
     }
@@ -728,7 +728,8 @@ static void reset_load_elf(void *opaque)
     }
 }
 
-static void fw_cfg_add_kernel_info(FWCfgState *fw_cfg)
+static void fw_cfg_add_kernel_info(const struct loaderparams *loaderparams,
+                                   FWCfgState *fw_cfg)
 {
     /*
      * Expose the kernel, the command line, and the initrd in fw_cfg.
@@ -737,36 +738,38 @@ static void fw_cfg_add_kernel_info(FWCfgState *fw_cfg)
      */
     load_image_to_fw_cfg(fw_cfg,
                          FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
-                         loaderparams.kernel_filename,
+                         loaderparams->kernel_filename,
                          false);
 
-    if (loaderparams.initrd_filename) {
+    if (loaderparams->initrd_filename) {
         load_image_to_fw_cfg(fw_cfg,
                              FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
-                             loaderparams.initrd_filename, false);
+                             loaderparams->initrd_filename, false);
     }
 
-    if (loaderparams.kernel_cmdline) {
+    if (loaderparams->kernel_cmdline) {
         fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
-                       strlen(loaderparams.kernel_cmdline) + 1);
+                       strlen(loaderparams->kernel_cmdline) + 1);
         fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
-                          loaderparams.kernel_cmdline);
+                          loaderparams->kernel_cmdline);
     }
 }
 
-static void loongarch_firmware_boot(LoongArchMachineState *lams)
+static void loongarch_firmware_boot(LoongArchMachineState *lams,
+                                    const struct loaderparams *loaderparams)
 {
-    fw_cfg_add_kernel_info(lams->fw_cfg);
+    fw_cfg_add_kernel_info(loaderparams, lams->fw_cfg);
 }
 
-static void loongarch_direct_kernel_boot(LoongArchMachineState *lams)
+static void loongarch_direct_kernel_boot(LoongArchMachineState *lams,
+                                         const struct loaderparams *loaderparams)
 {
     MachineState *machine = MACHINE(lams);
     int64_t kernel_addr = 0;
     LoongArchCPU *lacpu;
     int i;
 
-    kernel_addr = load_kernel_info();
+    kernel_addr = load_kernel_info(loaderparams);
     if (!machine->firmware) {
         for (i = 0; i < machine->smp.cpus; i++) {
             lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
@@ -793,6 +796,7 @@ static void loongarch_init(MachineState *machine)
     MachineClass *mc = MACHINE_GET_CLASS(machine);
     CPUState *cpu;
     char *ramName = NULL;
+    struct loaderparams loaderparams = { };
 
     if (!cpu_model) {
         cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@@ -898,9 +902,9 @@ static void loongarch_init(MachineState *machine)
     /* load the kernel. */
     if (loaderparams.kernel_filename) {
         if (lams->bios_loaded) {
-            loongarch_firmware_boot(lams);
+            loongarch_firmware_boot(lams, &loaderparams);
         } else {
-            loongarch_direct_kernel_boot(lams);
+            loongarch_direct_kernel_boot(lams, &loaderparams);
         }
     }
     fdt_add_flash_node(lams);
-- 
2.25.1

[PULL 4/7] hw/loongarch/virt: Remove unused ISA UART

[Song Gao]

From: Philippe Mathieu-Daudé <philmd@linaro.org>

The LoongArch 'virt' machine doesn't use any ISA UART.
No need to build the device model, remove its Kconfig entry.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20231010135342.40219-2-philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index 1e7c5b43c5..fcd5f2b4b6 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -7,7 +7,6 @@ config LOONGARCH_VIRT
     imply NVDIMM
     select ISA_BUS
     select SERIAL
-    select SERIAL_ISA
     select VIRTIO_PCI
     select PLATFORM_BUS
     select LOONGARCH_IPI
-- 
2.25.1

[PULL 5/7] hw/loongarch/virt: Remove unused ISA Bus

[Song Gao]

From: Philippe Mathieu-Daudé <philmd@linaro.org>

The LoongArch 'virt' machine doesn't use its ISA I/O region.

If a ISA device were to be mapped there, there is no support
for ISA IRQ. Unlikely useful. Simply remove.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20231010135342.40219-3-philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/Kconfig        | 1 -
 hw/loongarch/virt.c         | 5 -----
 include/hw/loongarch/virt.h | 3 ---
 3 files changed, 9 deletions(-)

diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index fcd5f2b4b6..5727efed6d 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -5,7 +5,6 @@ config LOONGARCH_VIRT
     imply VIRTIO_VGA
     imply PCI_DEVICES
     imply NVDIMM
-    select ISA_BUS
     select SERIAL
     select VIRTIO_PCI
     select PLATFORM_BUS
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index c6f64e941b..c1791f80dd 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -878,11 +878,6 @@ static void loongarch_init(MachineState *machine)
         machine_memory_devices_init(machine, device_mem_base, device_mem_size);
     }
 
-    /* Add isa io region */
-    memory_region_init_alias(&lams->isa_io, NULL, "isa-io",
-                             get_system_io(), 0, VIRT_ISA_IO_SIZE);
-    memory_region_add_subregion(address_space_mem, VIRT_ISA_IO_BASE,
-                                &lams->isa_io);
     /* load the BIOS image. */
     loongarch_firmware_init(lams);
 
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index f1659655c6..674f4655e0 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -16,8 +16,6 @@
 
 #define LOONGARCH_MAX_CPUS      256
 
-#define VIRT_ISA_IO_BASE        0x18000000UL
-#define VIRT_ISA_IO_SIZE        0x0004000
 #define VIRT_FWCFG_BASE         0x1e020000UL
 #define VIRT_BIOS_BASE          0x1c000000UL
 #define VIRT_BIOS_SIZE          (4 * MiB)
@@ -38,7 +36,6 @@ struct LoongArchMachineState {
 
     MemoryRegion lowmem;
     MemoryRegion highmem;
-    MemoryRegion isa_io;
     MemoryRegion bios;
     bool         bios_loaded;
     /* State for other subsystems/APIs: */
-- 
2.25.1

[PULL 6/7] hw/loongarch/virt: Remove unused 'loongarch_virt_pm' region

[Song Gao]

The system test shutdown uses the 'loongarch_virt_pm' region.
We can use the write AcpiFadtData.sleep_clt register to realize the shutdown.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20231012072351.1409344-1-gaosong@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 hw/loongarch/virt.c                 | 48 +----------------------------
 tests/tcg/loongarch64/system/boot.S |  7 +++--
 2 files changed, 5 insertions(+), 50 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index c1791f80dd..2952fe452e 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -308,10 +308,6 @@ static void fdt_add_memory_node(MachineState *ms,
     g_free(nodename);
 }
 
-#define PM_BASE 0x10080000
-#define PM_SIZE 0x100
-#define PM_CTRL 0x10
-
 static void virt_build_smbios(LoongArchMachineState *lams)
 {
     MachineState *ms = MACHINE(lams);
@@ -380,44 +376,6 @@ static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
     memmap_entries++;
 }
 
-/*
- * This is a placeholder for missing ACPI,
- * and will eventually be replaced.
- */
-static uint64_t loongarch_virt_pm_read(void *opaque, hwaddr addr, unsigned size)
-{
-    return 0;
-}
-
-static void loongarch_virt_pm_write(void *opaque, hwaddr addr,
-                               uint64_t val, unsigned size)
-{
-    if (addr != PM_CTRL) {
-        return;
-    }
-
-    switch (val) {
-    case 0x00:
-        qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
-        return;
-    case 0xff:
-        qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
-        return;
-    default:
-        return;
-    }
-}
-
-static const MemoryRegionOps loongarch_virt_pm_ops = {
-    .read  = loongarch_virt_pm_read,
-    .write = loongarch_virt_pm_write,
-    .endianness = DEVICE_NATIVE_ENDIAN,
-    .valid = {
-        .min_access_size = 1,
-        .max_access_size = 1
-    }
-};
-
 static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 {
     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
@@ -500,7 +458,7 @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
     SysBusDevice *d;
     PCIBus *pci_bus;
     MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg;
-    MemoryRegion *mmio_alias, *mmio_reg, *pm_mem;
+    MemoryRegion *mmio_alias, *mmio_reg;
     int i;
 
     gpex_dev = qdev_new(TYPE_GPEX_HOST);
@@ -560,10 +518,6 @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
     fdt_add_rtc_node(lams);
 
-    pm_mem = g_new(MemoryRegion, 1);
-    memory_region_init_io(pm_mem, NULL, &loongarch_virt_pm_ops,
-                          NULL, "loongarch_virt_pm", PM_SIZE);
-    memory_region_add_subregion(get_system_memory(), PM_BASE, pm_mem);
     /* acpi ged */
     lams->acpi_ged = create_acpi_ged(pch_pic, lams);
     /* platform bus */
diff --git a/tests/tcg/loongarch64/system/boot.S b/tests/tcg/loongarch64/system/boot.S
index 67eb1c04ce..37a81bafe7 100644
--- a/tests/tcg/loongarch64/system/boot.S
+++ b/tests/tcg/loongarch64/system/boot.S
@@ -21,9 +21,10 @@ _start:
 	.align 16
 _exit:
 2:      /* QEMU ACPI poweroff */
-	li.w  t0, 0xff
-	li.w  t1, 0x10080010
-	st.w  t0, t1, 0
+	li.w  t0, 0x34
+	li.w  t1, 0x100e001c
+	st.b  t0, t1, 0
+
 	idle  0
 	bl    2b
 
-- 
2.25.1

[PULL 7/7] LoongArch: step down as general arch maintainer

[Song Gao]

From: Xiaojuan Yang <yangxiaojuan@loongson.cn>

I haven't really been working on LoongArch for some time now,
so let's remove myself from this entry.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20231012095135.1423071-1-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 MAINTAINERS | 2 --
 1 file changed, 2 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index ceea4c2bf2..fdbef227ac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -248,7 +248,6 @@ F: disas/hppa.c
 
 LoongArch TCG CPUs
 M: Song Gao <gaosong@loongson.cn>
-M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
 S: Maintained
 F: target/loongarch/
 F: tests/tcg/loongarch64/
@@ -1191,7 +1190,6 @@ F: pc-bios/hppa-firmware.img
 LoongArch Machines
 ------------------
 Virt
-M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
 M: Song Gao <gaosong@loongson.cn>
 S: Maintained
 F: docs/system/loongarch/virt.rst
-- 
2.25.1

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 115 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any user-visible changes.

[-- Attachment #2: signature.asc --]
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[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit bc98ffdc7577e55ab8373c579c28fe24d600c40f:

  Merge tag 'pull-10.1-maintainer-may-2025-070625-1' of https://gitlab.com/stsquad/qemu into staging (2025-06-07 15:08:55 -0400)

are available in the Git repository at:

  https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250610

for you to fetch changes up to ffe89c1762d879fd39ba1be853d154677dbfbc7b:

  hw/loongarch/virt: Remove global variables about memmap tables (2025-06-10 15:01:41 +0800)

----------------------------------------------------------------
pull-loongarch_20250610

----------------------------------------------------------------
Bibo Mao (5):
      hw/loongarch/virt: Fix big endian support with MCFG table
      hw/intc/loongarch_pch: Convert to little endian with ID register
      hw/intc/loongarch_extioi: Fix typo issue about register EXTIOI_COREISR_END
      hw/loongarch/virt: Remove global variables about initrd
      hw/loongarch/virt: Remove global variables about memmap tables

Qiang Ma (1):
      hw/loongarch/virt: inform guest of kvm

Song Gao (1):
      target/loongarch: add check for fcond

 hw/intc/loongarch_pch_pic.c                      |  2 +-
 hw/loongarch/boot.c                              | 52 +++++++++++++-----------
 hw/loongarch/virt-acpi-build.c                   |  4 +-
 hw/loongarch/virt.c                              | 27 ++++++++----
 include/hw/intc/loongarch_extioi_common.h        |  2 +-
 include/hw/loongarch/boot.h                      |  5 +--
 include/hw/loongarch/virt.h                      |  2 +
 target/loongarch/tcg/insn_trans/trans_fcmp.c.inc | 25 ++++++++----
 target/loongarch/tcg/insn_trans/trans_vec.c.inc  | 16 ++++++--
 9 files changed, 87 insertions(+), 48 deletions(-)

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any user-visible changes.

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[PULL 0/7] loongarch-to-apply queue

[Bibo Mao]

The following changes since commit cf86770c7aa31ebd6e56f4eeb25c34107f92c51e:

  Merge tag 'pull-request-2025-01-21v2' of https://gitlab.com/thuth/qemu into staging (2025-01-22 09:59:02 -0500)

are available in the Git repository at:

  https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20250124

for you to fetch changes up to 3215fe8528de45a1794f0314623cc10bd8e8e19f:

  target/loongarch: Dump all generic CSR registers (2025-01-24 14:49:24 +0800)

----------------------------------------------------------------
pull-loongarch-20250124 queue

----------------------------------------------------------------
Bibo Mao (7):
      target/loongarch: Add dynamic function access with CSR register
      target/loongarch: Remove static CSR function setting
      target/loongarch: Add generic csr function type
      target/loongarch: Add common header file for CSR registers
      target/loongarch: Add common source file for CSR register
      target/loongarch: Set unused flag with CSR registers
      target/loongarch: Dump all generic CSR registers

 target/loongarch/cpu.c                             |  96 +++++++++---
 target/loongarch/csr.c                             | 129 +++++++++++++++++
 target/loongarch/csr.h                             |  29 ++++
 target/loongarch/meson.build                       |   1 +
 .../tcg/insn_trans/trans_privileged.c.inc          | 161 +++++----------------
 target/loongarch/tcg/tcg_loongarch.h               |  12 ++
 target/loongarch/tcg/translate.c                   |   5 +
 7 files changed, 294 insertions(+), 139 deletions(-)
 create mode 100644 target/loongarch/csr.c
 create mode 100644 target/loongarch/csr.h
 create mode 100644 target/loongarch/tcg/tcg_loongarch.h

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes.

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[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit 3b14a767eaca3df5534a162851f04787b363670e:

  Merge tag 'qemu-openbios-20240924' of https://github.com/mcayland/qemu into staging (2024-09-28 12:34:44 +0100)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929

for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:

  hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:22:56 +0800)

----------------------------------------------------------------
pull-loongarch-20240929

----------------------------------------------------------------
Bibo Mao (3):
      acpi: ged: Add macro for acpi sleep control register
      hw/loongarch/virt: Add FDT table support with acpi ged pm register
      target/loongarch: Avoid bits shift exceeding width of bool type

Jiaxun Yang (2):
      hw/loongarch/boot: Refactor EFI booting protocol generation
      hw/loongarch/boot: Rework boot code generation

Philippe Mathieu-Daudé (2):
      hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion
      hw/loongarch/fw_cfg: Build in common_ss[]

 hw/acpi/generic_event_device.c         |   6 +-
 hw/loongarch/boot.c                    | 321 +++++++++++++++++++++------------
 hw/loongarch/meson.build               |   2 +-
 hw/loongarch/virt.c                    |  39 ++++
 include/hw/acpi/generic_event_device.h |   7 +-
 include/hw/loongarch/boot.h            | 106 +++++++++--
 include/hw/loongarch/virt.h            |   1 -
 target/loongarch/arch_dump.c           |   6 +-
 8 files changed, 342 insertions(+), 146 deletions(-)

Re: [PULL 0/7] loongarch-to-apply queue

[Peter Maydell]

On Sun, 29 Sept 2024 at 09:35, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit 3b14a767eaca3df5534a162851f04787b363670e:
>
>   Merge tag 'qemu-openbios-20240924' of https://github.com/mcayland/qemu into staging (2024-09-28 12:34:44 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929
>
> for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:
>
>   hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:22:56 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20240929
>
> ----------------------------------------------------------------

Hi; this fails to build on 32-bit hosts:


https://gitlab.com/qemu-project/qemu/-/jobs/7953018819
https://gitlab.com/qemu-project/qemu/-/jobs/7953018846

../hw/loongarch/boot.c: In function ‘init_systab_32’:
../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
different size [-Werror=int-to-pointer-cast]
187 |           ((typeof(p))((uintptr_t)(s) + \
    |            ^
../hw/loongarch/boot.c:201:9: note: in expansion of macro ‘BOOTP_ALIGN_PTR_UP’
201 |      p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \
    |          ^~~~~~~~~~~~~~~~~~
../hw/loongarch/boot.c:243:1: note: in expansion of macro ‘EFI_INIT_SYSTAB_GEN’
243 | EFI_INIT_SYSTAB_GEN(32)
    | ^~~~~~~~~~~~~~~~~~~
../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
different size [-Werror=int-to-pointer-cast]
187 |          ((typeof(p))((uintptr_t)(s) + \
    |           ^

etc.

This happens because if the argument 'n' to BOOTP_ALIGN_PTR_UP()
is a 64-bit type (as EFI_TABLE_ALIGN happens to be) then the
expression ends up being calculated as 64-bits, which is bigger
than the type of a pointer on these hosts.

-- PMM

Re: [PULL 0/7] loongarch-to-apply queue

[gaosong]

在 2024/9/30 下午10:06, Peter Maydell 写道:
> On Sun, 29 Sept 2024 at 09:35, Song Gao <gaosong@loongson.cn> wrote:
>> The following changes since commit 3b14a767eaca3df5534a162851f04787b363670e:
>>
>>    Merge tag 'qemu-openbios-20240924' of https://github.com/mcayland/qemu into staging (2024-09-28 12:34:44 +0100)
>>
>> are available in the Git repository at:
>>
>>    https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240929
>>
>> for you to fetch changes up to f7c8ef7bad7495d8c84b262a8b243efe39e56b13:
>>
>>    hw/loongarch/fw_cfg: Build in common_ss[] (2024-09-29 16:22:56 +0800)
>>
>> ----------------------------------------------------------------
>> pull-loongarch-20240929
>>
>> ----------------------------------------------------------------
> Hi; this fails to build on 32-bit hosts:
>
>
> https://gitlab.com/qemu-project/qemu/-/jobs/7953018819
> https://gitlab.com/qemu-project/qemu/-/jobs/7953018846
>
> ../hw/loongarch/boot.c: In function ‘init_systab_32’:
> ../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
> different size [-Werror=int-to-pointer-cast]
> 187 |           ((typeof(p))((uintptr_t)(s) + \
>      |            ^
> ../hw/loongarch/boot.c:201:9: note: in expansion of macro ‘BOOTP_ALIGN_PTR_UP’
> 201 |      p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \
>      |          ^~~~~~~~~~~~~~~~~~
> ../hw/loongarch/boot.c:243:1: note: in expansion of macro ‘EFI_INIT_SYSTAB_GEN’
> 243 | EFI_INIT_SYSTAB_GEN(32)
>      | ^~~~~~~~~~~~~~~~~~~
> ../hw/loongarch/boot.c:187:10: error: cast to pointer from integer of
> different size [-Werror=int-to-pointer-cast]
> 187 |          ((typeof(p))((uintptr_t)(s) + \
>      |           ^
>
> etc.
>
> This happens because if the argument 'n' to BOOTP_ALIGN_PTR_UP()
> is a 64-bit type (as EFI_TABLE_ALIGN happens to be) then the
> expression ends up being calculated as 64-bits, which is bigger
> than the type of a pointer on these hosts.
>
> -- PMM
Sorry for  the late reply.

@Jiaxun  Could you fix this and update the patch?

Thanks.
Song Gao

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit 4b7ea33074450bc6148c8e1545d78f179e64adb4:

  Merge tag 'pull-request-2024-09-11' of https://gitlab.com/thuth/qemu into staging (2024-09-11 19:28:23 +0100)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240912

for you to fetch changes up to 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e:

  hw/loongarch: Add acpi SPCR table support (2024-09-12 20:57:54 +0800)

----------------------------------------------------------------
pull-loongarch-20240912

----------------------------------------------------------------
Bibo Mao (5):
      target/loongarch: Add compatible support about VM reboot
      hw/loongarch: Remove default enable with VIRTIO_VGA device
      target/loongarch/kvm: Add vCPU reset function
      target/loongarch: Support QMP dump-guest-memory
      hw/loongarch: Add acpi SPCR table support

Jason A. Donenfeld (2):
      hw/loongarch: virt: support up to 4 serial ports
      hw/loongarch: virt: pass random seed to fdt

 hw/loongarch/Kconfig                 |   1 -
 hw/loongarch/acpi-build.c            |  63 +++++++++++--
 hw/loongarch/virt.c                  |  33 ++++---
 include/hw/pci-host/ls7a.h           |   9 +-
 target/loongarch/arch_dump.c         | 167 +++++++++++++++++++++++++++++++++++
 target/loongarch/cpu.c               |  17 +++-
 target/loongarch/internals.h         |   2 +
 target/loongarch/kvm/kvm.c           |   5 +-
 target/loongarch/kvm/kvm_loongarch.h |   2 +-
 target/loongarch/meson.build         |   1 +
 10 files changed, 274 insertions(+), 26 deletions(-)
 create mode 100644 target/loongarch/arch_dump.c

Re: [PULL 0/7] loongarch-to-apply queue

[Peter Maydell]

On Thu, 12 Sept 2024 at 14:09, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit 4b7ea33074450bc6148c8e1545d78f179e64adb4:
>
>   Merge tag 'pull-request-2024-09-11' of https://gitlab.com/thuth/qemu into staging (2024-09-11 19:28:23 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240912
>
> for you to fetch changes up to 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e:
>
>   hw/loongarch: Add acpi SPCR table support (2024-09-12 20:57:54 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20240912
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2
for any user-visible changes.

-- PMM

[PULL 0/7] loongarch-to-apply queue

[Song Gao]

The following changes since commit a11f65ec1b8adcb012b89c92819cbda4dc25aaf1:

  Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2022-11-01 13:49:33 -0400)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20221103

for you to fetch changes up to d31e2b1af7e6db41e6088679babc3893bd69b4b3:

  target/loongarch: Fix raise_mmu_exception() set wrong exception_index (2022-11-03 17:59:19 +0800)

----------------------------------------------------------------
pull-loongarch-20221103

----------------------------------------------------------------
Song Gao (2):
      target/loongarch: Add exception subcode
      target/loongarch: Fix raise_mmu_exception() set wrong exception_index

Xiaojuan Yang (5):
      hw/intc: Convert the memops to with_attrs in LoongArch extioi
      hw/intc: Fix LoongArch extioi coreisr accessing
      hw/loongarch: Load FDT table into dram memory space
      hw/loongarch: Improve fdt for LoongArch virt machine
      hw/loongarch: Add TPM device for LoongArch virt machine

 hw/intc/loongarch_extioi.c      | 41 ++++++++++++++++-------------
 hw/intc/trace-events            |  3 +--
 hw/loongarch/acpi-build.c       | 50 +++++++++++++++++++++++++++++++++--
 hw/loongarch/virt.c             | 53 ++++++++++++++++++++++++++++++++-----
 include/hw/loongarch/virt.h     |  3 ---
 include/hw/pci-host/ls7a.h      |  1 +
 target/loongarch/cpu.c          |  8 ++++--
 target/loongarch/cpu.h          | 58 ++++++++++++++++++++++-------------------
 target/loongarch/iocsr_helper.c | 19 ++++++++------
 target/loongarch/tlb_helper.c   |  5 ++--
 10 files changed, 170 insertions(+), 71 deletions(-)

Re: [PULL 0/7] loongarch-to-apply queue

[Stefan Hajnoczi]

The cross-win32-system GitLab CI job fails to build with the following error:

i686-w64-mingw32-gcc -m32 -Ilibqemu-loongarch64-softmmu.fa.p -I. -I..
-Itarget/loongarch -I../target/loongarch -I../dtc/libfdt -Iqapi
-Itrace -Iui -Iui/shader
-I/usr/i686-w64-mingw32/sys-root/mingw/include/pixman-1
-I/usr/i686-w64-mingw32/sys-root/mingw/include/glib-2.0
-I/usr/i686-w64-mingw32/sys-root/mingw/lib/glib-2.0/include
-fdiagnostics-color=auto -Wall -Winvalid-pch -Werror -std=gnu11 -O2 -g
-iquote . -iquote /builds/qemu-project/qemu -iquote
/builds/qemu-project/qemu/include -iquote
/builds/qemu-project/qemu/tcg/i386 -mms-bitfields -U_FORTIFY_SOURCE
-D_FORTIFY_SOURCE=2 -fno-pie -no-pie -D_GNU_SOURCE
-D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes
-Wredundant-decls -Wundef -Wwrite-strings -Wmissing-prototypes
-fno-strict-aliasing -fno-common -fwrapv -Wold-style-declaration
-Wold-style-definition -Wtype-limits -Wformat-security -Wformat-y2k
-Winit-self -Wignored-qualifiers -Wempty-body -Wnested-externs
-Wendif-labels -Wexpansion-to-defined -Wimplicit-fallthrough=2
-Wno-missing-include-dirs -Wno-shift-negative-value -Wno-psabi
-fstack-protector-strong -DNEED_CPU_H
'-DCONFIG_TARGET="loongarch64-softmmu-config-target.h"'
'-DCONFIG_DEVICES="loongarch64-softmmu-config-devices.h"' -MD -MQ
libqemu-loongarch64-softmmu.fa.p/hw_loongarch_acpi-build.c.obj -MF
libqemu-loongarch64-softmmu.fa.p/hw_loongarch_acpi-build.c.obj.d -o
libqemu-loongarch64-softmmu.fa.p/hw_loongarch_acpi-build.c.obj -c
../hw/loongarch/acpi-build.c
../hw/loongarch/acpi-build.c: In function 'acpi_build':
../hw/loongarch/acpi-build.c:402:9: error: implicit declaration of
function 'tpm_get_version' [-Werror=implicit-function-declaration]
402 | if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) {
| ^~~~~~~~~~~~~~~
../hw/loongarch/acpi-build.c:402:9: error: nested extern declaration
of 'tpm_get_version' [-Werror=nested-externs]
../hw/loongarch/acpi-build.c:402:25: error: implicit declaration of
function 'tpm_find' [-Werror=implicit-function-declaration]
402 | if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) {
| ^~~~~~~~
../hw/loongarch/acpi-build.c:402:25: error: nested extern declaration
of 'tpm_find' [-Werror=nested-externs]
../hw/loongarch/acpi-build.c:402:40: error: 'TPM_VERSION_2_0'
undeclared (first use in this function); did you mean 'TP_VERSION'?
402 | if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) {
| ^~~~~~~~~~~~~~~
| TP_VERSION
../hw/loongarch/acpi-build.c:402:40: note: each undeclared identifier
is reported only once for each function it appears in

https://gitlab.com/qemu-project/qemu/-/jobs/3270049630

Stefan