From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH 17/20] target/sparc: Record entire jump condition in DisasContext
Date: Mon, 16 Oct 2023 23:41:06 -0700 [thread overview]
Message-ID: <20231017064109.681935-18-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231017064109.681935-1-richard.henderson@linaro.org>
Use the original condition instead of consuming cpu_cond,
which will now only be live along exception paths.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 27 ++++++++++++++++-----------
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 8a92fa4a1a..bdf1753a65 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -149,6 +149,12 @@ static TCGv cpu_wim;
/* Floating point registers */
static TCGv_i64 cpu_fpr[TARGET_DPREGS];
+typedef struct DisasCompare {
+ TCGCond cond;
+ TCGv c1;
+ int c2;
+} DisasCompare;
+
typedef struct DisasDelayException {
struct DisasDelayException *next;
TCGLabel *lab;
@@ -162,7 +168,11 @@ typedef struct DisasContext {
DisasContextBase base;
target_ulong pc; /* current Program Counter: integer or DYNAMIC_PC */
target_ulong npc; /* next PC: integer or DYNAMIC_PC or JUMP_PC */
- target_ulong jump_pc[2]; /* used when JUMP_PC pc value is used */
+
+ /* Used when JUMP_PC value is used. */
+ DisasCompare jump;
+ target_ulong jump_pc[2];
+
int mem_idx;
bool fpu_enabled;
bool address_mask_32bit;
@@ -181,12 +191,6 @@ typedef struct DisasContext {
DisasDelayException *delay_excp_list;
} DisasContext;
-typedef struct {
- TCGCond cond;
- TCGv c1;
- int c2;
-} DisasCompare;
-
// This function uses non-native bit order
#define GET_FIELD(X, FROM, TO) \
((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
@@ -850,9 +854,9 @@ static void gen_generic_branch(DisasContext *dc)
{
TCGv npc0 = tcg_constant_tl(dc->jump_pc[0]);
TCGv npc1 = tcg_constant_tl(dc->jump_pc[1]);
- TCGv zero = tcg_constant_tl(0);
+ TCGv c2 = tcg_constant_tl(dc->jump.c2);
- tcg_gen_movcond_tl(TCG_COND_NE, cpu_npc, cpu_cond, zero, npc0, npc1);
+ tcg_gen_movcond_tl(dc->jump.cond, cpu_npc, dc->jump.c1, c2, npc0, npc1);
}
/* call this function before using the condition register as it may
@@ -2255,7 +2259,7 @@ static bool advance_pc(DisasContext *dc)
case JUMP_PC:
/* we can do a static jump */
l1 = gen_new_label();
- tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cond, 0, l1);
+ tcg_gen_brcondi_tl(dc->jump.cond, dc->jump.c1, dc->jump.c2, l1);
/* jump not taken */
gen_goto_tb(dc, 1, dc->jump_pc[1], dc->jump_pc[1] + 4);
@@ -2339,9 +2343,10 @@ static bool advance_jump_cond(DisasContext *dc, DisasCompare *cmp,
}
} else {
dc->pc = npc;
+ dc->npc = JUMP_PC;
+ dc->jump = *cmp;
dc->jump_pc[0] = dest;
dc->jump_pc[1] = npc + 4;
- dc->npc = JUMP_PC;
/* The condition for cpu_cond is always NE -- normalize. */
if (cmp->cond == TCG_COND_NE) {
--
2.34.1
next prev parent reply other threads:[~2023-10-17 6:46 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-17 6:40 [PATCH 00/20] target/sparc: Cleanup condition codes etc Richard Henderson
2023-10-17 6:40 ` [PATCH 01/20] target/sparc: Introduce cpu_put_psr_icc Richard Henderson
2023-10-19 14:11 ` Philippe Mathieu-Daudé
2023-10-26 1:04 ` Richard Henderson
2023-10-17 6:40 ` [PATCH 02/20] target/sparc: Split psr and xcc into components Richard Henderson
2023-10-17 6:40 ` [PATCH 03/20] target/sparc: Remove CC_OP_DIV Richard Henderson
2023-10-17 6:40 ` [PATCH 04/20] target/sparc: Remove CC_OP_LOGIC Richard Henderson
2023-10-17 6:40 ` [PATCH 05/20] target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD Richard Henderson
2023-10-17 6:40 ` [PATCH 06/20] target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB Richard Henderson
2023-10-17 6:40 ` [PATCH 07/20] target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV Richard Henderson
2023-10-17 6:40 ` [PATCH 08/20] target/sparc: Remove CC_OP leftovers Richard Henderson
2023-10-17 6:40 ` [PATCH 09/20] target/sparc: Remove DisasCompare.is_bool Richard Henderson
2023-10-17 6:40 ` [PATCH 10/20] target/sparc: Change DisasCompare.c2 to int Richard Henderson
2023-10-17 6:41 ` [PATCH 11/20] target/sparc: Always copy conditions into a new temporary Richard Henderson
2023-10-17 6:41 ` [PATCH 12/20] target/sparc: Do flush_cond in advance_jump_cond Richard Henderson
2023-10-17 6:41 ` [PATCH 13/20] target/sparc: Merge gen_branch2 into advance_pc Richard Henderson
2023-10-17 6:41 ` [PATCH 14/20] target/sparc: Merge advance_jump_uncond_{never, always} into advance_jump_cond Richard Henderson
2023-10-17 6:41 ` [PATCH 15/20] target/sparc: Use DISAS_EXIT in do_wrpsr Richard Henderson
2023-10-17 6:41 ` [PATCH 16/20] target/sparc: Merge gen_op_next_insn into only caller Richard Henderson
2023-10-17 6:41 ` Richard Henderson [this message]
2023-10-17 6:41 ` [PATCH 18/20] target/sparc: Discard cpu_cond at the end of each insn Richard Henderson
2023-10-17 6:41 ` [PATCH 19/20] target/sparc: Implement UDIVX and SDIVX inline Richard Henderson
2023-10-17 6:41 ` [PATCH 20/20] target/sparc: Implement UDIV inline Richard Henderson
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