From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 3/4] hw/char/stm32f2xx_usart: Update IRQ when DR is written
Date: Fri, 20 Oct 2023 19:00:07 +0200 [thread overview]
Message-ID: <20231020170009.86870-4-philmd@linaro.org> (raw)
In-Reply-To: <20231020170009.86870-1-philmd@linaro.org>
From: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
[PMD: Split from bigger patch]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/char/stm32f2xx_usart.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c
index 46e29089bc..74f007591a 100644
--- a/hw/char/stm32f2xx_usart.c
+++ b/hw/char/stm32f2xx_usart.c
@@ -169,6 +169,7 @@ static void stm32f2xx_usart_write(void *opaque, hwaddr addr,
clear TC by writing 0 to the SR register, so set it again
on each write. */
s->usart_sr |= USART_SR_TC;
+ stm32f2xx_update_irq(s);
}
return;
case USART_BRR:
--
2.41.0
next prev parent reply other threads:[~2023-10-20 17:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-20 17:00 [PATCH v2 0/4] stm32f2xx_usart: implement TX interrupts Philippe Mathieu-Daudé
2023-10-20 17:00 ` [PATCH v2 1/4] hw/char/stm32f2xx_usart: Extract common IRQ update code to update_irq() Philippe Mathieu-Daudé
2023-10-22 16:53 ` Richard Henderson
2023-10-23 1:34 ` Alistair Francis
2023-10-20 17:00 ` [PATCH v2 2/4] hw/char/stm32f2xx_usart: Update IRQ when SR is read Philippe Mathieu-Daudé
2023-10-22 16:54 ` Richard Henderson
2023-10-23 1:36 ` Alistair Francis
2023-10-23 9:38 ` Hans-Erik Floryd
2023-10-20 17:00 ` Philippe Mathieu-Daudé [this message]
2023-10-22 16:54 ` [PATCH v2 3/4] hw/char/stm32f2xx_usart: Update IRQ when DR is written Richard Henderson
2023-10-23 1:37 ` Alistair Francis
2023-10-20 17:00 ` [PATCH v2 4/4] hw/char/stm32f2xx_usart: Add more definitions for CR1 register Philippe Mathieu-Daudé
2023-10-22 16:54 ` Richard Henderson
2023-10-23 1:38 ` Alistair Francis
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