From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@gmx.de
Subject: [PATCH v2 24/65] target/hppa: Pass d to do_log_cond
Date: Fri, 20 Oct 2023 13:42:50 -0700 [thread overview]
Message-ID: <20231020204331.139847-25-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231020204331.139847-1-richard.henderson@linaro.org>
Hoist the resolution of d up one level above do_log_cond.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/translate.c | 48 ++++++++++++++++++++++++++++++++---------
1 file changed, 38 insertions(+), 10 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index d480bac03d..d629f5f7f8 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -970,9 +970,11 @@ static DisasCond do_sub_cond(DisasContext *ctx, unsigned cf, bool d,
* how cases c={2,3} are treated.
*/
-static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
+static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, bool d,
+ TCGv_reg res)
{
- bool d = false;
+ TCGCond tc;
+ bool ext_uns;
switch (cf) {
case 0: /* never */
@@ -988,17 +990,29 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
return cond_make_t();
case 2: /* == */
- return cond_make_0(TCG_COND_EQ, res);
+ tc = TCG_COND_EQ;
+ ext_uns = true;
+ break;
case 3: /* <> */
- return cond_make_0(TCG_COND_NE, res);
+ tc = TCG_COND_NE;
+ ext_uns = true;
+ break;
case 4: /* < */
- return cond_make_0(TCG_COND_LT, res);
+ tc = TCG_COND_LT;
+ ext_uns = false;
+ break;
case 5: /* >= */
- return cond_make_0(TCG_COND_GE, res);
+ tc = TCG_COND_GE;
+ ext_uns = false;
+ break;
case 6: /* <= */
- return cond_make_0(TCG_COND_LE, res);
+ tc = TCG_COND_LE;
+ ext_uns = false;
+ break;
case 7: /* > */
- return cond_make_0(TCG_COND_GT, res);
+ tc = TCG_COND_GT;
+ ext_uns = false;
+ break;
case 14: /* OD */
case 15: /* EV */
@@ -1007,6 +1021,18 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
default:
g_assert_not_reached();
}
+
+ if (cond_need_ext(ctx, d)) {
+ TCGv_reg tmp = tcg_temp_new();
+
+ if (ext_uns) {
+ tcg_gen_ext32u_reg(tmp, res);
+ } else {
+ tcg_gen_ext32s_reg(tmp, res);
+ }
+ return cond_make_0_tmp(tc, tmp);
+ }
+ return cond_make_0(tc, res);
}
/* Similar, but for shift/extract/deposit conditions. */
@@ -1014,6 +1040,7 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigned cf, TCGv_reg res)
static DisasCond do_sed_cond(DisasContext *ctx, unsigned orig, TCGv_reg res)
{
unsigned c, f;
+ bool d = false;
/* Convert the compressed condition codes to standard.
0-2 are the same as logicals (nv,<,<=), while 3 is OD.
@@ -1024,7 +1051,7 @@ static DisasCond do_sed_cond(DisasContext *ctx, unsigned orig, TCGv_reg res)
}
f = (orig & 4) / 4;
- return do_log_cond(ctx, c * 2 + f, res);
+ return do_log_cond(ctx, c * 2 + f, d, res);
}
/* Similar, but for unit conditions. */
@@ -1368,6 +1395,7 @@ static void do_log(DisasContext *ctx, unsigned rt, TCGv_reg in1,
void (*fn)(TCGv_reg, TCGv_reg, TCGv_reg))
{
TCGv_reg dest = dest_gpr(ctx, rt);
+ bool d = false;
/* Perform the operation, and writeback. */
fn(dest, in1, in2);
@@ -1376,7 +1404,7 @@ static void do_log(DisasContext *ctx, unsigned rt, TCGv_reg in1,
/* Install the new nullification. */
cond_free(&ctx->null_cond);
if (cf) {
- ctx->null_cond = do_log_cond(ctx, cf, dest);
+ ctx->null_cond = do_log_cond(ctx, cf, d, dest);
}
}
--
2.34.1
next prev parent reply other threads:[~2023-10-20 20:49 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-20 20:42 [PATCH v2 00/65] target/hppa: Implement hppa64-cpu Richard Henderson
2023-10-20 20:42 ` [PATCH v2 01/65] tcg: Improve expansion of deposit of constant Richard Henderson
2023-10-20 20:42 ` [PATCH v2 02/65] tcg: Improve expansion of deposit into a constant Richard Henderson
2023-10-20 20:42 ` [PATCH v2 03/65] target/hppa: Remove get_temp Richard Henderson
2023-10-20 20:42 ` [PATCH v2 04/65] target/hppa: Remove get_temp_tl Richard Henderson
2023-10-20 20:42 ` [PATCH v2 05/65] target/hppa: Remove load_const Richard Henderson
2023-10-20 21:15 ` Philippe Mathieu-Daudé
2023-10-20 20:42 ` [PATCH v2 06/65] target/hppa: Fix hppa64 case in machine.c Richard Henderson
2023-10-20 20:42 ` [PATCH v2 07/65] target/hppa: Fix load in do_load_32 Richard Henderson
2023-10-20 20:42 ` [PATCH v2 08/65] target/hppa: Truncate rotate count in trans_shrpw_sar Richard Henderson
2023-10-20 20:42 ` [PATCH v2 09/65] target/hppa: Fix trans_ds for hppa64 Richard Henderson
2023-10-20 20:42 ` [PATCH v2 10/65] target/hppa: Fix do_add, do_sub " Richard Henderson
2023-10-20 20:42 ` [PATCH v2 11/65] target/hppa: Fix bb_sar " Richard Henderson
2023-10-20 20:42 ` [PATCH v2 12/65] target/hppa: Fix extrw and depw with sar " Richard Henderson
2023-10-20 20:42 ` [PATCH v2 13/65] target/hppa: Introduce TYPE_HPPA64_CPU Richard Henderson
2023-10-20 21:19 ` Philippe Mathieu-Daudé
2023-10-20 20:42 ` [PATCH v2 14/65] target/hppa: Make HPPA_BTLB_ENTRIES variable Richard Henderson
2023-10-20 20:42 ` [PATCH v2 15/65] target/hppa: Implement cpu_list Richard Henderson
2023-10-20 20:42 ` [PATCH v2 16/65] target/hppa: Implement hppa_cpu_class_by_name Richard Henderson
2023-10-20 20:42 ` [PATCH v2 17/65] target/hppa: Update cpu_hppa_get/put_psw for hppa64 Richard Henderson
2023-10-20 20:42 ` [PATCH v2 18/65] target/hppa: Handle absolute addresses for pa2.0 Richard Henderson
2023-10-20 20:42 ` [PATCH v2 19/65] target/hppa: Adjust hppa_cpu_dump_state for hppa64 Richard Henderson
2023-10-20 21:35 ` Philippe Mathieu-Daudé
2023-10-20 20:42 ` [PATCH v2 20/65] target/hppa: Fix hppa64 addressing Richard Henderson
2023-10-20 20:42 ` [PATCH v2 21/65] target/hppa: sar register allows only 5 bits on 32-bit CPU Richard Henderson
2023-10-20 20:42 ` [PATCH v2 22/65] target/hppa: Pass d to do_cond Richard Henderson
2023-10-20 20:42 ` [PATCH v2 23/65] target/hppa: Pass d to do_sub_cond Richard Henderson
2023-10-20 20:42 ` Richard Henderson [this message]
2023-10-20 20:42 ` [PATCH v2 25/65] target/hppa: Pass d to do_sed_cond Richard Henderson
2023-10-20 20:42 ` [PATCH v2 26/65] target/hppa: Pass d to do_unit_cond Richard Henderson
2023-10-20 20:42 ` [PATCH v2 27/65] linux-user/hppa: Fixes for TARGET_ABI32 Richard Henderson
2023-10-20 20:42 ` [PATCH v2 28/65] target/hppa: Drop attempted gdbstub support for hppa64 Richard Henderson
2023-10-20 20:42 ` [PATCH v2 29/65] target/hppa: Remove TARGET_HPPA64 Richard Henderson
2023-10-20 20:42 ` [PATCH v2 30/65] target/hppa: Decode d for logical instructions Richard Henderson
2023-10-20 20:42 ` [PATCH v2 31/65] target/hppa: Decode d for unit instructions Richard Henderson
2023-10-20 20:42 ` [PATCH v2 32/65] target/hppa: Decode d for cmpclr instructions Richard Henderson
2023-10-20 20:42 ` [PATCH v2 33/65] target/hppa: Decode d for add instructions Richard Henderson
2023-10-20 20:43 ` [PATCH v2 34/65] target/hppa: Decode d for sub instructions Richard Henderson
2023-10-20 20:43 ` [PATCH v2 35/65] target/hppa: Decode d for bb instructions Richard Henderson
2023-10-20 20:43 ` [PATCH v2 36/65] target/hppa: Decode d for cmpb instructions Richard Henderson
2023-10-20 20:43 ` [PATCH v2 37/65] target/hppa: Decode CMPIB double-word Richard Henderson
2023-10-20 20:43 ` [PATCH v2 38/65] target/hppa: Decode ADDB double-word Richard Henderson
2023-10-20 20:43 ` [PATCH v2 39/65] target/hppa: Implement LDD, LDCD, LDDA, STD, STDA Richard Henderson
2023-10-20 20:43 ` [PATCH v2 40/65] target/hppa: Implement DEPD, DEPDI Richard Henderson
2023-10-20 20:43 ` [PATCH v2 41/65] target/hppa: Implement EXTRD Richard Henderson
2023-10-20 20:43 ` [PATCH v2 42/65] target/hppa: Implement SHRPD Richard Henderson
2023-10-20 20:43 ` [PATCH v2 43/65] target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM Richard Henderson
2023-10-20 20:43 ` [PATCH v2 44/65] target/hppa: Implement STDBY Richard Henderson
2023-10-20 20:43 ` [PATCH v2 45/65] target/hppa: Implement IDTLBT, IITLBT Richard Henderson
2023-10-20 20:43 ` [PATCH v2 46/65] hw/hppa: Use uint32_t instead of target_ureg Richard Henderson
2023-10-20 21:34 ` Philippe Mathieu-Daudé
2023-10-20 20:43 ` [PATCH v2 47/65] target/hppa: Remove TARGET_REGISTER_BITS Richard Henderson
2023-10-20 21:31 ` Philippe Mathieu-Daudé
2023-10-26 16:59 ` Richard Henderson
2023-10-20 20:43 ` [PATCH v2 48/65] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections Richard Henderson
2023-10-20 20:43 ` [PATCH v2 49/65] target/hppa: Remove remaining " Richard Henderson
2023-10-20 20:43 ` [PATCH v2 50/65] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new Richard Henderson
2023-10-20 20:43 ` [PATCH v2 51/65] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64 Richard Henderson
2023-10-20 20:43 ` [PATCH v2 52/65] target/hppa: Implement HADD Richard Henderson
2023-10-20 20:43 ` [PATCH v2 53/65] target/hppa: Implement HSUB Richard Henderson
2023-10-20 20:43 ` [PATCH v2 54/65] target/hppa: Implement HAVG Richard Henderson
2023-10-20 20:43 ` [PATCH v2 55/65] target/hppa: Implement HSHL, HSHR Richard Henderson
2023-10-20 20:43 ` [PATCH v2 56/65] target/hppa: Implement HSHLADD, HSHRADD Richard Henderson
2023-10-20 20:43 ` [PATCH v2 57/65] target/hppa: Implement MIXH, MIXW Richard Henderson
2023-10-20 20:43 ` [PATCH v2 58/65] target/hppa: Implement PERMH Richard Henderson
2023-10-20 20:43 ` [PATCH v2 59/65] target/hppa: Fix interruption based on default PSW Richard Henderson
2023-10-20 20:43 ` [PATCH v2 60/65] target/hppa: Precompute zero into DisasContext Richard Henderson
2023-10-20 21:32 ` Philippe Mathieu-Daudé
2023-10-20 20:43 ` [PATCH v2 61/65] target/hppa: Return zero for r0 from load_gpr Richard Henderson
2023-10-20 21:32 ` Philippe Mathieu-Daudé
2023-10-20 20:43 ` [PATCH v2 62/65] target/hppa: Simplify trans_dep*_imm Richard Henderson
2023-10-20 20:43 ` [PATCH v2 63/65] include/hw/elf: Remove truncating signed casts Richard Henderson
2023-10-20 20:43 ` [PATCH v2 64/65] hw/hppa: Translate phys addresses for the cpu Richard Henderson
2023-10-20 20:43 ` [PATCH v2 65/65] linux-user/hppa: Drop EXCP_DUMP from handled exceptions Richard Henderson
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