From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH v4 12/90] target/sparc: Move BPcc and Bicc to decodetree
Date: Sat, 21 Oct 2023 22:59:13 -0700 [thread overview]
Message-ID: <20231022060031.490251-13-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231022060031.490251-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/insns.decode | 4 ++
target/sparc/translate.c | 117 +++++++++++++++++++-------------------
2 files changed, 61 insertions(+), 60 deletions(-)
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index a5f5d2681e..15cd975f4e 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -3,4 +3,8 @@
# Sparc instruction decode definitions.
# Copyright (c) 2023 Richard Henderson <rth@twiddle.net>
+&bcc i a cond cc
+BPcc 00 a:1 cond:4 001 cc:1 0 - i:s19 &bcc
+Bicc 00 a:1 cond:4 010 i:s22 &bcc cc=0
+
CALL 01 i:s30
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 7ef4c6d4f7..92ea6bab6b 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -1367,44 +1367,6 @@ static void gen_cond_reg(TCGv r_dst, int cond, TCGv r_src)
}
#endif
-static void do_branch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
-{
- unsigned int cond = GET_FIELD(insn, 3, 6), a = (insn & (1 << 29));
- target_ulong target = dc->pc + offset;
-
- if (unlikely(AM_CHECK(dc))) {
- target &= 0xffffffffULL;
- }
- if (cond == 0x0) {
- /* unconditional not taken */
- if (a) {
- dc->pc = dc->npc + 4;
- dc->npc = dc->pc + 4;
- } else {
- dc->pc = dc->npc;
- dc->npc = dc->pc + 4;
- }
- } else if (cond == 0x8) {
- /* unconditional taken */
- if (a) {
- dc->pc = target;
- dc->npc = dc->pc + 4;
- } else {
- dc->pc = dc->npc;
- dc->npc = target;
- tcg_gen_mov_tl(cpu_pc, cpu_npc);
- }
- } else {
- flush_cond(dc);
- gen_cond(cpu_cond, cc, cond, dc);
- if (a) {
- gen_branch_a(dc, target);
- } else {
- gen_branch_n(dc, target);
- }
- }
-}
-
static void do_fbranch(DisasContext *dc, int32_t offset, uint32_t insn, int cc)
{
unsigned int cond = GET_FIELD(insn, 3, 6), a = (insn & (1 << 29));
@@ -3046,6 +3008,61 @@ static bool advance_pc(DisasContext *dc)
return true;
}
+static bool advance_jump_uncond_never(DisasContext *dc, bool annul)
+{
+ if (annul) {
+ dc->pc = dc->npc + 4;
+ dc->npc = dc->pc + 4;
+ } else {
+ dc->pc = dc->npc;
+ dc->npc = dc->pc + 4;
+ }
+ return true;
+}
+
+static bool advance_jump_uncond_always(DisasContext *dc, bool annul,
+ target_ulong dest)
+{
+ if (annul) {
+ dc->pc = dest;
+ dc->npc = dest + 4;
+ } else {
+ dc->pc = dc->npc;
+ dc->npc = dest;
+ tcg_gen_mov_tl(cpu_pc, cpu_npc);
+ }
+ return true;
+}
+
+static bool advance_jump_cond(DisasContext *dc, bool annul, target_ulong dest)
+{
+ if (annul) {
+ gen_branch_a(dc, dest);
+ } else {
+ gen_branch_n(dc, dest);
+ }
+ return true;
+}
+
+static bool do_bpcc(DisasContext *dc, arg_bcc *a)
+{
+ target_long target = address_mask_i(dc, dc->pc + a->i * 4);
+
+ switch (a->cond) {
+ case 0x0:
+ return advance_jump_uncond_never(dc, a->a);
+ case 0x8:
+ return advance_jump_uncond_always(dc, a->a, target);
+ default:
+ flush_cond(dc);
+ gen_cond(cpu_cond, a->cc, a->cond, dc);
+ return advance_jump_cond(dc, a->a, target);
+ }
+}
+
+TRANS(Bicc, ALL, do_bpcc, a)
+TRANS(BPcc, 64, do_bpcc, a)
+
static bool trans_CALL(DisasContext *dc, arg_CALL *a)
{
target_long target = address_mask_i(dc, dc->pc + a->i * 4);
@@ -3083,21 +3100,7 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
switch (xop) {
#ifdef TARGET_SPARC64
case 0x1: /* V9 BPcc */
- {
- int cc;
-
- target = GET_FIELD_SP(insn, 0, 18);
- target = sign_extend(target, 19);
- target <<= 2;
- cc = GET_FIELD_SP(insn, 20, 21);
- if (cc == 0)
- do_branch(dc, target, insn, 0);
- else if (cc == 2)
- do_branch(dc, target, insn, 1);
- else
- goto illegal_insn;
- goto jmp_insn;
- }
+ g_assert_not_reached(); /* in decodetree */
case 0x3: /* V9 BPr */
{
target = GET_FIELD_SP(insn, 0, 13) |
@@ -3127,13 +3130,7 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
}
#endif
case 0x2: /* BN+x */
- {
- target = GET_FIELD(insn, 10, 31);
- target = sign_extend(target, 22);
- target <<= 2;
- do_branch(dc, target, insn, 0);
- goto jmp_insn;
- }
+ g_assert_not_reached(); /* in decodetree */
case 0x6: /* FBN+x */
{
if (gen_trap_ifnofpu(dc)) {
--
2.34.1
next prev parent reply other threads:[~2023-10-22 6:16 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-22 5:59 [PATCH v4 00/90] target/sparc: Convert to decodetree Richard Henderson
2023-10-22 5:59 ` [PATCH v4 01/90] target/sparc: Clear may_lookup for npc == DYNAMIC_PC Richard Henderson
2023-10-22 5:59 ` [PATCH v4 02/90] target/sparc: Implement check_align inline Richard Henderson
2023-10-22 5:59 ` [PATCH v4 03/90] target/sparc: Avoid helper_raise_exception in helper_st_asi Richard Henderson
2023-10-22 5:59 ` [PATCH v4 04/90] target/sparc: Set TCG_GUEST_DEFAULT_MO Richard Henderson
2023-10-22 5:59 ` [PATCH v4 05/90] configs: Enable MTTCG for sparc, sparc64 Richard Henderson
2023-10-22 5:59 ` [PATCH v4 06/90] target/sparc: Define features via cpu-feature.h.inc Richard Henderson
2023-10-22 5:59 ` [PATCH v4 07/90] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties Richard Henderson
2023-10-22 5:59 ` [PATCH v4 08/90] target/sparc: Remove sparcv7 cpu features Richard Henderson
2023-10-22 5:59 ` [PATCH v4 09/90] target/sparc: Add decodetree infrastructure Richard Henderson
2023-10-22 5:59 ` [PATCH v4 10/90] target/sparc: Define AM_CHECK for sparc32 Richard Henderson
2023-10-22 5:59 ` [PATCH v4 11/90] target/sparc: Move CALL to decodetree Richard Henderson
2023-10-22 5:59 ` Richard Henderson [this message]
2023-10-22 5:59 ` [PATCH v4 13/90] target/sparc: Move BPr " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 14/90] target/sparc: Move FBPfcc and FBfcc " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 15/90] target/sparc: Merge gen_cond with only caller Richard Henderson
2023-10-22 5:59 ` [PATCH v4 16/90] target/sparc: Merge gen_fcond " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 17/90] target/sparc: Merge gen_branch_[an] " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 18/90] target/sparc: Pass DisasCompare to advance_jump_cond Richard Henderson
2023-10-22 5:59 ` [PATCH v4 19/90] target/sparc: Move SETHI to decodetree Richard Henderson
2023-10-22 5:59 ` [PATCH v4 20/90] target/sparc: Move Tcc " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 21/90] target/sparc: Move RDASR, STBAR, MEMBAR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 22/90] target/sparc: Move RDPSR, RDHPR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 23/90] target/sparc: Move RDWIM, RDPR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 24/90] target/sparc: Move RDTBR, FLUSHW " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 25/90] target/sparc: Move WRASR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 26/90] target/sparc: Move WRPSR, SAVED, RESTORED " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 27/90] target/sparc: Move WRWIM, WRPR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 28/90] target/sparc: Move WRTBR, WRHPR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 29/90] target/sparc: Move basic arithmetic " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 30/90] target/sparc: Move ADDC " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 31/90] target/sparc: Move MULX " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 32/90] target/sparc: Move UMUL, SMUL " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 33/90] target/sparc: Move SUBC " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 34/90] target/sparc: Move UDIVX, SDIVX " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 35/90] target/sparc: Move UDIV, SDIV " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 36/90] target/sparc: Move TADD, TSUB, MULS " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 37/90] target/sparc: Move SLL, SRL, SRA " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 38/90] target/sparc: Move MOVcc, MOVR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 39/90] target/sparc: Move POPC " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 40/90] target/sparc: Convert remaining v8 coproc insns " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 41/90] target/sparc: Move JMPL, RETT, RETURN " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 42/90] target/sparc: Move FLUSH, SAVE, RESTORE " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 43/90] target/sparc: Move DONE, RETRY " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 44/90] target/sparc: Split out resolve_asi Richard Henderson
2023-10-22 5:59 ` [PATCH v4 45/90] target/sparc: Drop ifdef around get_asi and friends Richard Henderson
2023-10-22 5:59 ` [PATCH v4 46/90] target/sparc: Split out ldst functions with asi pre-computed Richard Henderson
2023-10-22 5:59 ` [PATCH v4 47/90] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX Richard Henderson
2023-10-22 5:59 ` [PATCH v4 48/90] target/sparc: Move simple integer load/store to decodetree Richard Henderson
2023-10-22 5:59 ` [PATCH v4 49/90] target/sparc: Move asi " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 50/90] target/sparc: Move LDSTUB, LDSTUBA " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 51/90] target/sparc: Move SWAP, SWAPA " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 52/90] target/sparc: Move CASA, CASXA " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 53/90] target/sparc: Move PREFETCH, PREFETCHA " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 54/90] target/sparc: Split out fp ldst functions with asi precomputed Richard Henderson
2023-10-22 5:59 ` [PATCH v4 55/90] target/sparc: Move simple fp load/store to decodetree Richard Henderson
2023-10-22 5:59 ` [PATCH v4 56/90] target/sparc: Move asi " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 57/90] target/sparc: Move LDFSR, STFSR " Richard Henderson
2023-10-22 5:59 ` [PATCH v4 58/90] target/sparc: Merge LDFSR, LDXFSR implementations Richard Henderson
2023-10-22 6:00 ` [PATCH v4 59/90] target/sparc: Move EDGE* to decodetree Richard Henderson
2023-10-22 6:00 ` [PATCH v4 60/90] target/sparc: Move ARRAY* " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 61/90] target/sparc: Move ADDRALIGN* " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 62/90] target/sparc: Move BMASK " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 63/90] target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 64/90] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 65/90] target/sparc: Use tcg_gen_vec_{add,sub}* Richard Henderson
2023-10-22 6:00 ` [PATCH v4 66/90] target/sparc: Move gen_ne_fop_FFF insns to decodetree Richard Henderson
2023-10-22 6:00 ` [PATCH v4 67/90] target/sparc: Move gen_ne_fop_DDD " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 68/90] target/sparc: Move PDIST " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 69/90] target/sparc: Move gen_gsr_fop_DDD insns " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 70/90] target/sparc: Move gen_fop_FF " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 71/90] target/sparc: Move gen_fop_DD " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 72/90] target/sparc: Move FSQRTq " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 73/90] target/sparc: Move gen_fop_FFF insns " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 74/90] target/sparc: Move gen_fop_DDD " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 75/90] target/sparc: Move gen_fop_QQQ " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 76/90] target/sparc: Move FSMULD " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 77/90] target/sparc: Move FDMULQ " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 78/90] target/sparc: Move gen_fop_FD insns " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 79/90] target/sparc: Move FiTOd, FsTOd, FsTOx " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 80/90] target/sparc: Move FqTOs, FqTOi " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 81/90] target/sparc: Move FqTOd, FqTOx " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 82/90] target/sparc: Move FiTOq, FsTOq " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 83/90] target/sparc: Move FdTOq, FxTOq " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 84/90] target/sparc: Move FMOVq, FNEGq, FABSq " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 85/90] target/sparc: Move FMOVR, FMOVcc, FMOVfcc " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 86/90] target/sparc: Convert FCMP, FCMPE " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 87/90] target/sparc: Move FPCMP* " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 88/90] target/sparc: Move FPACK16, FPACKFIX " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 89/90] target/sparc: Convert FZERO, FONE " Richard Henderson
2023-10-22 6:00 ` [PATCH v4 90/90] target/sparc: Remove disas_sparc_legacy Richard Henderson
2023-10-22 12:44 ` [PATCH v4 00/90] target/sparc: Convert to decodetree Mark Cave-Ayland
2023-10-22 17:10 ` Richard Henderson
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