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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH v4 39/90] target/sparc: Move POPC to decodetree
Date: Sat, 21 Oct 2023 22:59:40 -0700	[thread overview]
Message-ID: <20231022060031.490251-40-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231022060031.490251-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/insns.decode |  3 +++
 target/sparc/translate.c  | 56 +++++++--------------------------------
 2 files changed, 12 insertions(+), 47 deletions(-)

diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index cb21405e1a..a596b0fc85 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -183,6 +183,9 @@ TSUBcc      10 ..... 100001 ..... . .............          @r_r_ri_cc1
 TADDccTV    10 ..... 100010 ..... . .............          @r_r_ri_cc1
 TSUBccTV    10 ..... 100011 ..... . .............          @r_r_ri_cc1
 
+POPC        10 rd:5  101110 00000 imm:1 rs2_or_imm:s13     \
+            &r_r_ri_cc rs1=0 cc=0
+
 &shiftr     rd rs1 rs2 x:bool
 @shiftr     .. rd:5  ...... rs1:5 . x:1 ....... rs2:5      &shiftr
 
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index b907873359..9d1307653c 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -727,6 +727,11 @@ static void gen_op_tsubcctv(TCGv dst, TCGv src1, TCGv src2)
     gen_helper_tsubcctv(dst, tcg_env, src1, src2);
 }
 
+static void gen_op_popc(TCGv dst, TCGv src1, TCGv src2)
+{
+    tcg_gen_ctpop_tl(dst, src2);
+}
+
 // 1
 static void gen_op_eval_ba(TCGv dst)
 {
@@ -2720,19 +2725,6 @@ static TCGv get_src1(DisasContext *dc, unsigned int insn)
     return gen_load_gpr(dc, rs1);
 }
 
-static TCGv get_src2(DisasContext *dc, unsigned int insn)
-{
-    if (IS_IMM) { /* immediate */
-        target_long simm = GET_FIELDs(insn, 19, 31);
-        TCGv t = tcg_temp_new();
-        tcg_gen_movi_tl(t, simm);
-        return t;
-    } else {      /* register */
-        unsigned int rs2 = GET_FIELD(insn, 27, 31);
-        return gen_load_gpr(dc, rs2);
-    }
-}
-
 #ifdef TARGET_SPARC64
 static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
 {
@@ -4288,6 +4280,9 @@ TRANS(TSUBcc, ALL, do_arith, a, CC_OP_TSUB, gen_op_sub_cc, NULL)
 TRANS(TADDccTV, ALL, do_arith, a, CC_OP_TADDTV, gen_op_taddcctv, NULL)
 TRANS(TSUBccTV, ALL, do_arith, a, CC_OP_TSUBTV, gen_op_tsubcctv, NULL)
 
+/* TODO: Should have feature bit -- comes in with UltraSparc T2. */
+TRANS(POPC, 64, do_arith, a, 0, gen_op_popc, NULL)
+
 static bool trans_OR(DisasContext *dc, arg_r_r_ri_cc *a)
 {
     /* OR with %g0 is the canonical alias for MOV. */
@@ -4875,40 +4870,7 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
                         goto illegal_insn;
                 }
             } else if (xop < 0x36) {
-                if (xop < 0x20) {
-                    goto illegal_insn;
-                } else {
-                    cpu_src1 = get_src1(dc, insn);
-                    cpu_src2 = get_src2(dc, insn);
-                    switch (xop) {
-                    case 0x20: /* taddcc */
-                    case 0x21: /* tsubcc */
-                    case 0x22: /* taddcctv */
-                    case 0x23: /* tsubcctv */
-                    case 0x24: /* mulscc */
-                    case 0x25:  /* sll */
-                    case 0x26:  /* srl */
-                    case 0x27:  /* sra */
-                        goto illegal_insn;  /* in decodetree */
-                    case 0x30:
-                        goto illegal_insn;  /* WRASR in decodetree */
-                    case 0x32:
-                        goto illegal_insn;  /* WRPR in decodetree */
-                    case 0x33: /* wrtbr, UA2005 wrhpr */
-                        goto illegal_insn;  /* WRTBR, WRHPR in decodetree */
-#ifdef TARGET_SPARC64
-                    case 0x2c: /* V9 movcc */
-                    case 0x2f: /* V9 movr */
-                        goto illegal_insn;  /* in decodetree */
-                    case 0x2e: /* V9 popc */
-                        tcg_gen_ctpop_tl(cpu_dst, cpu_src2);
-                        gen_store_gpr(dc, rd, cpu_dst);
-                        break;
-#endif
-                    default:
-                        goto illegal_insn;
-                    }
-                }
+                goto illegal_insn; /* in decodetree */
             } else if (xop == 0x36) { /* UltraSparc shutdown, VIS, V8 CPop1 */
 #ifdef TARGET_SPARC64
                 int opf = GET_FIELD_SP(insn, 5, 13);
-- 
2.34.1



  parent reply	other threads:[~2023-10-22  6:05 UTC|newest]

Thread overview: 93+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-22  5:59 [PATCH v4 00/90] target/sparc: Convert to decodetree Richard Henderson
2023-10-22  5:59 ` [PATCH v4 01/90] target/sparc: Clear may_lookup for npc == DYNAMIC_PC Richard Henderson
2023-10-22  5:59 ` [PATCH v4 02/90] target/sparc: Implement check_align inline Richard Henderson
2023-10-22  5:59 ` [PATCH v4 03/90] target/sparc: Avoid helper_raise_exception in helper_st_asi Richard Henderson
2023-10-22  5:59 ` [PATCH v4 04/90] target/sparc: Set TCG_GUEST_DEFAULT_MO Richard Henderson
2023-10-22  5:59 ` [PATCH v4 05/90] configs: Enable MTTCG for sparc, sparc64 Richard Henderson
2023-10-22  5:59 ` [PATCH v4 06/90] target/sparc: Define features via cpu-feature.h.inc Richard Henderson
2023-10-22  5:59 ` [PATCH v4 07/90] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties Richard Henderson
2023-10-22  5:59 ` [PATCH v4 08/90] target/sparc: Remove sparcv7 cpu features Richard Henderson
2023-10-22  5:59 ` [PATCH v4 09/90] target/sparc: Add decodetree infrastructure Richard Henderson
2023-10-22  5:59 ` [PATCH v4 10/90] target/sparc: Define AM_CHECK for sparc32 Richard Henderson
2023-10-22  5:59 ` [PATCH v4 11/90] target/sparc: Move CALL to decodetree Richard Henderson
2023-10-22  5:59 ` [PATCH v4 12/90] target/sparc: Move BPcc and Bicc " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 13/90] target/sparc: Move BPr " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 14/90] target/sparc: Move FBPfcc and FBfcc " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 15/90] target/sparc: Merge gen_cond with only caller Richard Henderson
2023-10-22  5:59 ` [PATCH v4 16/90] target/sparc: Merge gen_fcond " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 17/90] target/sparc: Merge gen_branch_[an] " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 18/90] target/sparc: Pass DisasCompare to advance_jump_cond Richard Henderson
2023-10-22  5:59 ` [PATCH v4 19/90] target/sparc: Move SETHI to decodetree Richard Henderson
2023-10-22  5:59 ` [PATCH v4 20/90] target/sparc: Move Tcc " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 21/90] target/sparc: Move RDASR, STBAR, MEMBAR " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 22/90] target/sparc: Move RDPSR, RDHPR " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 23/90] target/sparc: Move RDWIM, RDPR " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 24/90] target/sparc: Move RDTBR, FLUSHW " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 25/90] target/sparc: Move WRASR " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 26/90] target/sparc: Move WRPSR, SAVED, RESTORED " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 27/90] target/sparc: Move WRWIM, WRPR " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 28/90] target/sparc: Move WRTBR, WRHPR " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 29/90] target/sparc: Move basic arithmetic " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 30/90] target/sparc: Move ADDC " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 31/90] target/sparc: Move MULX " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 32/90] target/sparc: Move UMUL, SMUL " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 33/90] target/sparc: Move SUBC " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 34/90] target/sparc: Move UDIVX, SDIVX " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 35/90] target/sparc: Move UDIV, SDIV " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 36/90] target/sparc: Move TADD, TSUB, MULS " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 37/90] target/sparc: Move SLL, SRL, SRA " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 38/90] target/sparc: Move MOVcc, MOVR " Richard Henderson
2023-10-22  5:59 ` Richard Henderson [this message]
2023-10-22  5:59 ` [PATCH v4 40/90] target/sparc: Convert remaining v8 coproc insns " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 41/90] target/sparc: Move JMPL, RETT, RETURN " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 42/90] target/sparc: Move FLUSH, SAVE, RESTORE " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 43/90] target/sparc: Move DONE, RETRY " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 44/90] target/sparc: Split out resolve_asi Richard Henderson
2023-10-22  5:59 ` [PATCH v4 45/90] target/sparc: Drop ifdef around get_asi and friends Richard Henderson
2023-10-22  5:59 ` [PATCH v4 46/90] target/sparc: Split out ldst functions with asi pre-computed Richard Henderson
2023-10-22  5:59 ` [PATCH v4 47/90] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX Richard Henderson
2023-10-22  5:59 ` [PATCH v4 48/90] target/sparc: Move simple integer load/store to decodetree Richard Henderson
2023-10-22  5:59 ` [PATCH v4 49/90] target/sparc: Move asi " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 50/90] target/sparc: Move LDSTUB, LDSTUBA " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 51/90] target/sparc: Move SWAP, SWAPA " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 52/90] target/sparc: Move CASA, CASXA " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 53/90] target/sparc: Move PREFETCH, PREFETCHA " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 54/90] target/sparc: Split out fp ldst functions with asi precomputed Richard Henderson
2023-10-22  5:59 ` [PATCH v4 55/90] target/sparc: Move simple fp load/store to decodetree Richard Henderson
2023-10-22  5:59 ` [PATCH v4 56/90] target/sparc: Move asi " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 57/90] target/sparc: Move LDFSR, STFSR " Richard Henderson
2023-10-22  5:59 ` [PATCH v4 58/90] target/sparc: Merge LDFSR, LDXFSR implementations Richard Henderson
2023-10-22  6:00 ` [PATCH v4 59/90] target/sparc: Move EDGE* to decodetree Richard Henderson
2023-10-22  6:00 ` [PATCH v4 60/90] target/sparc: Move ARRAY* " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 61/90] target/sparc: Move ADDRALIGN* " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 62/90] target/sparc: Move BMASK " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 63/90] target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 64/90] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 65/90] target/sparc: Use tcg_gen_vec_{add,sub}* Richard Henderson
2023-10-22  6:00 ` [PATCH v4 66/90] target/sparc: Move gen_ne_fop_FFF insns to decodetree Richard Henderson
2023-10-22  6:00 ` [PATCH v4 67/90] target/sparc: Move gen_ne_fop_DDD " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 68/90] target/sparc: Move PDIST " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 69/90] target/sparc: Move gen_gsr_fop_DDD insns " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 70/90] target/sparc: Move gen_fop_FF " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 71/90] target/sparc: Move gen_fop_DD " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 72/90] target/sparc: Move FSQRTq " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 73/90] target/sparc: Move gen_fop_FFF insns " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 74/90] target/sparc: Move gen_fop_DDD " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 75/90] target/sparc: Move gen_fop_QQQ " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 76/90] target/sparc: Move FSMULD " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 77/90] target/sparc: Move FDMULQ " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 78/90] target/sparc: Move gen_fop_FD insns " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 79/90] target/sparc: Move FiTOd, FsTOd, FsTOx " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 80/90] target/sparc: Move FqTOs, FqTOi " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 81/90] target/sparc: Move FqTOd, FqTOx " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 82/90] target/sparc: Move FiTOq, FsTOq " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 83/90] target/sparc: Move FdTOq, FxTOq " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 84/90] target/sparc: Move FMOVq, FNEGq, FABSq " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 85/90] target/sparc: Move FMOVR, FMOVcc, FMOVfcc " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 86/90] target/sparc: Convert FCMP, FCMPE " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 87/90] target/sparc: Move FPCMP* " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 88/90] target/sparc: Move FPACK16, FPACKFIX " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 89/90] target/sparc: Convert FZERO, FONE " Richard Henderson
2023-10-22  6:00 ` [PATCH v4 90/90] target/sparc: Remove disas_sparc_legacy Richard Henderson
2023-10-22 12:44 ` [PATCH v4 00/90] target/sparc: Convert to decodetree Mark Cave-Ayland
2023-10-22 17:10   ` Richard Henderson

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