From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH v5 32/94] target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver
Date: Sun, 22 Oct 2023 16:28:30 -0700 [thread overview]
Message-ID: <20231022232932.80507-33-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231022232932.80507-1-richard.henderson@linaro.org>
Use direct loads and stores to env instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 32 +++++++++++++-------------------
1 file changed, 13 insertions(+), 19 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 65b71dd931..7b83803b6b 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -82,15 +82,9 @@ static TCGv cpu_cond;
#ifdef TARGET_SPARC64
static TCGv_i32 cpu_xcc, cpu_fprs;
static TCGv cpu_gsr;
-static TCGv cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver;
#else
# define cpu_fprs ({ qemu_build_not_reached(); (TCGv)NULL; })
# define cpu_gsr ({ qemu_build_not_reached(); (TCGv)NULL; })
-# define cpu_hintp ({ qemu_build_not_reached(); (TCGv)NULL; })
-# define cpu_htba ({ qemu_build_not_reached(); (TCGv)NULL; })
-# define cpu_hver ({ qemu_build_not_reached(); (TCGv)NULL; })
-# define cpu_ssr ({ qemu_build_not_reached(); (TCGv)NULL; })
-# define cpu_ver ({ qemu_build_not_reached(); (TCGv)NULL; })
#endif
/* Floating point registers */
static TCGv_i64 cpu_fpr[TARGET_DPREGS];
@@ -3383,21 +3377,24 @@ TRANS(RDHPR_htstate, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhtstate)
static TCGv do_rdhintp(DisasContext *dc, TCGv dst)
{
- return cpu_hintp;
+ tcg_gen_ld_tl(dst, tcg_env, env64_field_offsetof(hintp));
+ return dst;
}
TRANS(RDHPR_hintp, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhintp)
static TCGv do_rdhtba(DisasContext *dc, TCGv dst)
{
- return cpu_htba;
+ tcg_gen_ld_tl(dst, tcg_env, env64_field_offsetof(htba));
+ return dst;
}
TRANS(RDHPR_htba, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhtba)
static TCGv do_rdhver(DisasContext *dc, TCGv dst)
{
- return cpu_hver;
+ tcg_gen_ld_tl(dst, tcg_env, env64_field_offsetof(hver));
+ return dst;
}
TRANS(RDHPR_hver, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdhver)
@@ -3572,14 +3569,16 @@ TRANS(RDPR_gl, GL, do_rd_special, supervisor(dc), a->rd, do_rdgl)
/* UA2005 strand status */
static TCGv do_rdssr(DisasContext *dc, TCGv dst)
{
- return cpu_ssr;
+ tcg_gen_ld_tl(dst, tcg_env, env64_field_offsetof(ssr));
+ return dst;
}
TRANS(RDPR_strand_status, HYPV, do_rd_special, hypervisor(dc), a->rd, do_rdssr)
static TCGv do_rdver(DisasContext *dc, TCGv dst)
{
- return cpu_ver;
+ tcg_gen_ld_tl(dst, tcg_env, env64_field_offsetof(version));
+ return dst;
}
TRANS(RDPR_ver, 64, do_rd_special, supervisor(dc), a->rd, do_rdver)
@@ -3926,7 +3925,7 @@ TRANS(WRPR_gl, GL, do_wr_special, a, supervisor(dc), do_wrgl)
/* UA2005 strand status */
static void do_wrssr(DisasContext *dc, TCGv src)
{
- tcg_gen_mov_tl(cpu_ssr, src);
+ tcg_gen_st_tl(src, tcg_env, env64_field_offsetof(ssr));
}
TRANS(WRPR_strand_status, HYPV, do_wr_special, a, hypervisor(dc), do_wrssr)
@@ -3959,14 +3958,14 @@ TRANS(WRHPR_htstate, HYPV, do_wr_special, a, hypervisor(dc), do_wrhtstate)
static void do_wrhintp(DisasContext *dc, TCGv src)
{
- tcg_gen_mov_tl(cpu_hintp, src);
+ tcg_gen_st_tl(src, tcg_env, env64_field_offsetof(hintp));
}
TRANS(WRHPR_hintp, HYPV, do_wr_special, a, hypervisor(dc), do_wrhintp)
static void do_wrhtba(DisasContext *dc, TCGv src)
{
- tcg_gen_mov_tl(cpu_htba, src);
+ tcg_gen_st_tl(src, tcg_env, env64_field_offsetof(htba));
}
TRANS(WRHPR_htba, HYPV, do_wr_special, a, hypervisor(dc), do_wrhtba)
@@ -5942,11 +5941,6 @@ void sparc_tcg_init(void)
static const struct { TCGv *ptr; int off; const char *name; } rtl[] = {
#ifdef TARGET_SPARC64
{ &cpu_gsr, offsetof(CPUSPARCState, gsr), "gsr" },
- { &cpu_hintp, offsetof(CPUSPARCState, hintp), "hintp" },
- { &cpu_htba, offsetof(CPUSPARCState, htba), "htba" },
- { &cpu_hver, offsetof(CPUSPARCState, hver), "hver" },
- { &cpu_ssr, offsetof(CPUSPARCState, ssr), "ssr" },
- { &cpu_ver, offsetof(CPUSPARCState, version), "ver" },
#endif
{ &cpu_cond, offsetof(CPUSPARCState, cond), "cond" },
{ &cpu_cc_src, offsetof(CPUSPARCState, cc_src), "cc_src" },
--
2.34.1
next prev parent reply other threads:[~2023-10-22 23:41 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-22 23:27 [PATCH v5 00/94] target/sparc: Convert to decodetree Richard Henderson
2023-10-22 23:27 ` [PATCH v5 01/94] target/sparc: Clear may_lookup for npc == DYNAMIC_PC Richard Henderson
2023-10-22 23:28 ` [PATCH v5 02/94] target/sparc: Implement check_align inline Richard Henderson
2023-10-22 23:28 ` [PATCH v5 03/94] target/sparc: Avoid helper_raise_exception in helper_st_asi Richard Henderson
2023-10-22 23:28 ` [PATCH v5 04/94] target/sparc: Set TCG_GUEST_DEFAULT_MO Richard Henderson
2023-10-22 23:28 ` [PATCH v5 05/94] configs: Enable MTTCG for sparc, sparc64 Richard Henderson
2023-10-22 23:28 ` [PATCH v5 06/94] target/sparc: Define features via cpu-feature.h.inc Richard Henderson
2023-10-22 23:28 ` [PATCH v5 07/94] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties Richard Henderson
2023-10-22 23:28 ` [PATCH v5 08/94] target/sparc: Remove sparcv7 cpu features Richard Henderson
2023-10-22 23:28 ` [PATCH v5 09/94] target/sparc: Partition " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 10/94] target/sparc: Add decodetree infrastructure Richard Henderson
2023-10-22 23:28 ` [PATCH v5 11/94] target/sparc: Define AM_CHECK for sparc32 Richard Henderson
2023-10-22 23:28 ` [PATCH v5 12/94] target/sparc: Move CALL to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 13/94] target/sparc: Move BPcc and Bicc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 14/94] target/sparc: Move BPr " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 15/94] target/sparc: Move FBPfcc and FBfcc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 16/94] target/sparc: Merge gen_cond with only caller Richard Henderson
2023-10-22 23:28 ` [PATCH v5 17/94] target/sparc: Merge gen_fcond " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 18/94] target/sparc: Merge gen_branch_[an] " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 19/94] target/sparc: Pass DisasCompare to advance_jump_cond Richard Henderson
2023-10-22 23:28 ` [PATCH v5 20/94] target/sparc: Move SETHI to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 21/94] target/sparc: Move Tcc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 22/94] target/sparc: Move RDASR, STBAR, MEMBAR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 23/94] target/sparc: Move RDPSR, RDHPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 24/94] target/sparc: Move RDWIM, RDPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 25/94] target/sparc: Move RDTBR, FLUSHW " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 26/94] target/sparc: Move WRASR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 27/94] target/sparc: Move WRPSR, SAVED, RESTORED " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 28/94] target/sparc: Move WRWIM, WRPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 29/94] target/sparc: Move WRTBR, WRHPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 30/94] target/sparc: Remove cpu_wim Richard Henderson
2023-10-22 23:28 ` [PATCH v5 31/94] target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr Richard Henderson
2023-10-22 23:28 ` Richard Henderson [this message]
2023-10-22 23:28 ` [PATCH v5 33/94] target/sparc: Move basic arithmetic to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 34/94] target/sparc: Move ADDC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 35/94] target/sparc: Move MULX " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 36/94] target/sparc: Move UMUL, SMUL " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 37/94] target/sparc: Move SUBC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 38/94] target/sparc: Move UDIVX, SDIVX " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 39/94] target/sparc: Move UDIV, SDIV " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 40/94] target/sparc: Move TADD, TSUB, MULS " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 41/94] target/sparc: Move SLL, SRL, SRA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 42/94] target/sparc: Move MOVcc, MOVR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 43/94] target/sparc: Move POPC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 44/94] target/sparc: Convert remaining v8 coproc insns " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 45/94] target/sparc: Move JMPL, RETT, RETURN " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 46/94] target/sparc: Move FLUSH, SAVE, RESTORE " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 47/94] target/sparc: Move DONE, RETRY " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 48/94] target/sparc: Split out resolve_asi Richard Henderson
2023-10-22 23:28 ` [PATCH v5 49/94] target/sparc: Drop ifdef around get_asi and friends Richard Henderson
2023-10-22 23:28 ` [PATCH v5 50/94] target/sparc: Split out ldst functions with asi pre-computed Richard Henderson
2023-10-22 23:28 ` [PATCH v5 51/94] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX Richard Henderson
2023-10-22 23:28 ` [PATCH v5 52/94] target/sparc: Move simple integer load/store to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 53/94] target/sparc: Move asi " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 54/94] target/sparc: Move LDSTUB, LDSTUBA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 55/94] target/sparc: Move SWAP, SWAPA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 56/94] target/sparc: Move CASA, CASXA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 57/94] target/sparc: Move PREFETCH, PREFETCHA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 58/94] target/sparc: Split out fp ldst functions with asi precomputed Richard Henderson
2023-10-22 23:28 ` [PATCH v5 59/94] target/sparc: Move simple fp load/store to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 60/94] target/sparc: Move asi " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 61/94] target/sparc: Move LDFSR, STFSR " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 62/94] target/sparc: Merge LDFSR, LDXFSR implementations Richard Henderson
2023-10-22 23:29 ` [PATCH v5 63/94] target/sparc: Move EDGE* to decodetree Richard Henderson
2023-10-22 23:29 ` [PATCH v5 64/94] target/sparc: Move ARRAY* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 65/94] target/sparc: Move ADDRALIGN* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 66/94] target/sparc: Move BMASK " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 67/94] target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 68/94] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 69/94] target/sparc: Use tcg_gen_vec_{add,sub}* Richard Henderson
2023-10-22 23:29 ` [PATCH v5 70/94] target/sparc: Move gen_ne_fop_FFF insns to decodetree Richard Henderson
2023-10-22 23:29 ` [PATCH v5 71/94] target/sparc: Move gen_ne_fop_DDD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 72/94] target/sparc: Move PDIST " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 73/94] target/sparc: Move gen_gsr_fop_DDD insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 74/94] target/sparc: Move gen_fop_FF " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 75/94] target/sparc: Move gen_fop_DD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 76/94] target/sparc: Move FSQRTq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 77/94] target/sparc: Move gen_fop_FFF insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 78/94] target/sparc: Move gen_fop_DDD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 79/94] target/sparc: Move gen_fop_QQQ " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 80/94] target/sparc: Move FSMULD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 81/94] target/sparc: Move FDMULQ " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 82/94] target/sparc: Move gen_fop_FD insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 83/94] target/sparc: Move FiTOd, FsTOd, FsTOx " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 84/94] target/sparc: Move FqTOs, FqTOi " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 85/94] target/sparc: Move FqTOd, FqTOx " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 86/94] target/sparc: Move FiTOq, FsTOq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 87/94] target/sparc: Move FdTOq, FxTOq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 88/94] target/sparc: Move FMOVq, FNEGq, FABSq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 89/94] target/sparc: Move FMOVR, FMOVcc, FMOVfcc " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 90/94] target/sparc: Convert FCMP, FCMPE " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 91/94] target/sparc: Move FPCMP* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 92/94] target/sparc: Move FPACK16, FPACKFIX " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 93/94] target/sparc: Convert FZERO, FONE " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 94/94] target/sparc: Remove disas_sparc_legacy Richard Henderson
2023-10-23 18:04 ` [PATCH v5 00/94] target/sparc: Convert to decodetree Mark Cave-Ayland
2023-10-23 22:41 ` Richard Henderson
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