qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH v5 47/94] target/sparc: Move DONE, RETRY to decodetree
Date: Sun, 22 Oct 2023 16:28:45 -0700	[thread overview]
Message-ID: <20231022232932.80507-48-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231022232932.80507-1-richard.henderson@linaro.org>

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/insns.decode |  3 ++
 target/sparc/translate.c  | 88 ++++++++++++---------------------------
 2 files changed, 29 insertions(+), 62 deletions(-)

diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index aa90b5c5bb..137b7eb3c6 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -228,6 +228,9 @@ NOP         10 00000 111011 ----- 1 -------------          # FLUSH reg+imm
 SAVE        10 ..... 111100 ..... . .............          @r_r_ri
 RESTORE     10 ..... 111101 ..... . .............          @r_r_ri
 
+DONE        10 00000 111110 00000 0 0000000000000
+RETRY       10 00001 111110 00000 0 0000000000000
+
 NCP         10 ----- 110110 ----- --------- -----          # v8 CPop1
 NCP         10 ----- 110111 ----- --------- -----          # v8 CPop2
 
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index e90be8b959..7fc4d8945a 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -43,10 +43,12 @@
 # define gen_helper_wrpsr(E, S)                 qemu_build_not_reached()
 #else
 # define gen_helper_clear_softint(E, S)         qemu_build_not_reached()
+# define gen_helper_done(E)                     qemu_build_not_reached()
 # define gen_helper_flushw(E)                   qemu_build_not_reached()
 # define gen_helper_rdccr(D, E)                 qemu_build_not_reached()
 # define gen_helper_rdcwp(D, E)                 qemu_build_not_reached()
 # define gen_helper_restored(E)                 qemu_build_not_reached()
+# define gen_helper_retry(E)                    qemu_build_not_reached()
 # define gen_helper_saved(E)                    qemu_build_not_reached()
 # define gen_helper_sdivx(D, E, A, B)           qemu_build_not_reached()
 # define gen_helper_set_softint(E, S)           qemu_build_not_reached()
@@ -4477,6 +4479,25 @@ static bool do_restore(DisasContext *dc, int rd, TCGv src)
 
 TRANS(RESTORE, ALL, do_add_special, a, do_restore)
 
+static bool do_done_retry(DisasContext *dc, bool done)
+{
+    if (!supervisor(dc)) {
+        return raise_priv(dc);
+    }
+    dc->npc = DYNAMIC_PC;
+    dc->pc = DYNAMIC_PC;
+    translator_io_start(&dc->base);
+    if (done) {
+        gen_helper_done(tcg_env);
+    } else {
+        gen_helper_retry(tcg_env);
+    }
+    return true;
+}
+
+TRANS(DONE, 64, do_done_retry, true)
+TRANS(RETRY, 64, do_done_retry, false)
+
 #define CHECK_IU_FEATURE(dc, FEATURE)                      \
     if (!((dc)->def->features & CPU_FEATURE_ ## FEATURE))  \
         goto illegal_insn;
@@ -4488,7 +4509,8 @@ TRANS(RESTORE, ALL, do_add_special, a, do_restore)
 static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
 {
     unsigned int opc, rs1, rs2, rd;
-    TCGv cpu_src1, cpu_src2;
+    TCGv cpu_src1;
+    TCGv cpu_src2 __attribute__((unused));
     TCGv_i32 cpu_src1_32, cpu_src2_32, cpu_dst_32;
     TCGv_i64 cpu_src1_64, cpu_src2_64, cpu_dst_64;
     target_long simm;
@@ -4503,9 +4525,8 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
         g_assert_not_reached(); /* in decodetree */
     case 2:                     /* FPU & Logical Operations */
         {
-            unsigned int xop __attribute__((unused)) = GET_FIELD(insn, 7, 12);
+            unsigned int xop = GET_FIELD(insn, 7, 12);
             TCGv cpu_dst __attribute__((unused)) = tcg_temp_new();
-            TCGv cpu_tmp0 __attribute__((unused));
 
             if (xop == 0x34) {   /* FPU Operations */
                 if (gen_trap_ifnofpu(dc)) {
@@ -4825,8 +4846,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
                     default:
                         goto illegal_insn;
                 }
-            } else if (xop < 0x36) {
-                goto illegal_insn; /* in decodetree */
             } else if (xop == 0x36) {
 #ifdef TARGET_SPARC64
                 /* VIS */
@@ -5268,65 +5287,10 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
                 default:
                     goto illegal_insn;
                 }
-#else
-                g_assert_not_reached(); /* in decodetree */
 #endif
-            } else if (xop == 0x37) {
-                /* V8 CPop2, V9 impdep2 */
-                goto illegal_insn; /* in decodetree */
             } else {
-                cpu_src1 = get_src1(dc, insn);
-                cpu_tmp0 = tcg_temp_new();
-                if (IS_IMM) {   /* immediate */
-                    simm = GET_FIELDs(insn, 19, 31);
-                    tcg_gen_addi_tl(cpu_tmp0, cpu_src1, simm);
-                } else {                /* register */
-                    rs2 = GET_FIELD(insn, 27, 31);
-                    if (rs2) {
-                        cpu_src2 = gen_load_gpr(dc, rs2);
-                        tcg_gen_add_tl(cpu_tmp0, cpu_src1, cpu_src2);
-                    } else {
-                        tcg_gen_mov_tl(cpu_tmp0, cpu_src1);
-                    }
-                }
-                switch (xop) {
-                case 0x38:      /* jmpl */
-                case 0x39:      /* rett, V9 return */
-                case 0x3b:      /* flush */
-                case 0x3c:      /* save */
-                case 0x3d:      /* restore */
-                    g_assert_not_reached();  /* in decode tree */
-#if !defined(CONFIG_USER_ONLY) && defined(TARGET_SPARC64)
-                case 0x3e:      /* V9 done/retry */
-                    {
-                        switch (rd) {
-                        case 0:
-                            if (!supervisor(dc))
-                                goto priv_insn;
-                            dc->npc = DYNAMIC_PC;
-                            dc->pc = DYNAMIC_PC;
-                            translator_io_start(&dc->base);
-                            gen_helper_done(tcg_env);
-                            goto jmp_insn;
-                        case 1:
-                            if (!supervisor(dc))
-                                goto priv_insn;
-                            dc->npc = DYNAMIC_PC;
-                            dc->pc = DYNAMIC_PC;
-                            translator_io_start(&dc->base);
-                            gen_helper_retry(tcg_env);
-                            goto jmp_insn;
-                        default:
-                            goto illegal_insn;
-                        }
-                    }
-                    break;
-#endif
-                default:
-                    goto illegal_insn;
-                }
+                goto illegal_insn; /* in decodetree */
             }
-            break;
         }
         break;
     case 3:                     /* load/store instructions */
@@ -5723,7 +5687,7 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
  illegal_insn:
     gen_exception(dc, TT_ILL_INSN);
     return;
-#if !defined(CONFIG_USER_ONLY)
+#if !defined(CONFIG_USER_ONLY) && !defined(TARGET_SPARC64)
  priv_insn:
     gen_exception(dc, TT_PRIV_INSN);
     return;
-- 
2.34.1



  parent reply	other threads:[~2023-10-22 23:42 UTC|newest]

Thread overview: 97+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-22 23:27 [PATCH v5 00/94] target/sparc: Convert to decodetree Richard Henderson
2023-10-22 23:27 ` [PATCH v5 01/94] target/sparc: Clear may_lookup for npc == DYNAMIC_PC Richard Henderson
2023-10-22 23:28 ` [PATCH v5 02/94] target/sparc: Implement check_align inline Richard Henderson
2023-10-22 23:28 ` [PATCH v5 03/94] target/sparc: Avoid helper_raise_exception in helper_st_asi Richard Henderson
2023-10-22 23:28 ` [PATCH v5 04/94] target/sparc: Set TCG_GUEST_DEFAULT_MO Richard Henderson
2023-10-22 23:28 ` [PATCH v5 05/94] configs: Enable MTTCG for sparc, sparc64 Richard Henderson
2023-10-22 23:28 ` [PATCH v5 06/94] target/sparc: Define features via cpu-feature.h.inc Richard Henderson
2023-10-22 23:28 ` [PATCH v5 07/94] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties Richard Henderson
2023-10-22 23:28 ` [PATCH v5 08/94] target/sparc: Remove sparcv7 cpu features Richard Henderson
2023-10-22 23:28 ` [PATCH v5 09/94] target/sparc: Partition " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 10/94] target/sparc: Add decodetree infrastructure Richard Henderson
2023-10-22 23:28 ` [PATCH v5 11/94] target/sparc: Define AM_CHECK for sparc32 Richard Henderson
2023-10-22 23:28 ` [PATCH v5 12/94] target/sparc: Move CALL to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 13/94] target/sparc: Move BPcc and Bicc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 14/94] target/sparc: Move BPr " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 15/94] target/sparc: Move FBPfcc and FBfcc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 16/94] target/sparc: Merge gen_cond with only caller Richard Henderson
2023-10-22 23:28 ` [PATCH v5 17/94] target/sparc: Merge gen_fcond " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 18/94] target/sparc: Merge gen_branch_[an] " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 19/94] target/sparc: Pass DisasCompare to advance_jump_cond Richard Henderson
2023-10-22 23:28 ` [PATCH v5 20/94] target/sparc: Move SETHI to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 21/94] target/sparc: Move Tcc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 22/94] target/sparc: Move RDASR, STBAR, MEMBAR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 23/94] target/sparc: Move RDPSR, RDHPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 24/94] target/sparc: Move RDWIM, RDPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 25/94] target/sparc: Move RDTBR, FLUSHW " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 26/94] target/sparc: Move WRASR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 27/94] target/sparc: Move WRPSR, SAVED, RESTORED " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 28/94] target/sparc: Move WRWIM, WRPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 29/94] target/sparc: Move WRTBR, WRHPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 30/94] target/sparc: Remove cpu_wim Richard Henderson
2023-10-22 23:28 ` [PATCH v5 31/94] target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr Richard Henderson
2023-10-22 23:28 ` [PATCH v5 32/94] target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver Richard Henderson
2023-10-22 23:28 ` [PATCH v5 33/94] target/sparc: Move basic arithmetic to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 34/94] target/sparc: Move ADDC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 35/94] target/sparc: Move MULX " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 36/94] target/sparc: Move UMUL, SMUL " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 37/94] target/sparc: Move SUBC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 38/94] target/sparc: Move UDIVX, SDIVX " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 39/94] target/sparc: Move UDIV, SDIV " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 40/94] target/sparc: Move TADD, TSUB, MULS " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 41/94] target/sparc: Move SLL, SRL, SRA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 42/94] target/sparc: Move MOVcc, MOVR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 43/94] target/sparc: Move POPC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 44/94] target/sparc: Convert remaining v8 coproc insns " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 45/94] target/sparc: Move JMPL, RETT, RETURN " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 46/94] target/sparc: Move FLUSH, SAVE, RESTORE " Richard Henderson
2023-10-22 23:28 ` Richard Henderson [this message]
2023-10-22 23:28 ` [PATCH v5 48/94] target/sparc: Split out resolve_asi Richard Henderson
2023-10-22 23:28 ` [PATCH v5 49/94] target/sparc: Drop ifdef around get_asi and friends Richard Henderson
2023-10-22 23:28 ` [PATCH v5 50/94] target/sparc: Split out ldst functions with asi pre-computed Richard Henderson
2023-10-22 23:28 ` [PATCH v5 51/94] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX Richard Henderson
2023-10-22 23:28 ` [PATCH v5 52/94] target/sparc: Move simple integer load/store to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 53/94] target/sparc: Move asi " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 54/94] target/sparc: Move LDSTUB, LDSTUBA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 55/94] target/sparc: Move SWAP, SWAPA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 56/94] target/sparc: Move CASA, CASXA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 57/94] target/sparc: Move PREFETCH, PREFETCHA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 58/94] target/sparc: Split out fp ldst functions with asi precomputed Richard Henderson
2023-10-22 23:28 ` [PATCH v5 59/94] target/sparc: Move simple fp load/store to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 60/94] target/sparc: Move asi " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 61/94] target/sparc: Move LDFSR, STFSR " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 62/94] target/sparc: Merge LDFSR, LDXFSR implementations Richard Henderson
2023-10-22 23:29 ` [PATCH v5 63/94] target/sparc: Move EDGE* to decodetree Richard Henderson
2023-10-22 23:29 ` [PATCH v5 64/94] target/sparc: Move ARRAY* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 65/94] target/sparc: Move ADDRALIGN* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 66/94] target/sparc: Move BMASK " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 67/94] target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 68/94] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 69/94] target/sparc: Use tcg_gen_vec_{add,sub}* Richard Henderson
2023-10-22 23:29 ` [PATCH v5 70/94] target/sparc: Move gen_ne_fop_FFF insns to decodetree Richard Henderson
2023-10-22 23:29 ` [PATCH v5 71/94] target/sparc: Move gen_ne_fop_DDD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 72/94] target/sparc: Move PDIST " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 73/94] target/sparc: Move gen_gsr_fop_DDD insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 74/94] target/sparc: Move gen_fop_FF " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 75/94] target/sparc: Move gen_fop_DD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 76/94] target/sparc: Move FSQRTq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 77/94] target/sparc: Move gen_fop_FFF insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 78/94] target/sparc: Move gen_fop_DDD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 79/94] target/sparc: Move gen_fop_QQQ " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 80/94] target/sparc: Move FSMULD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 81/94] target/sparc: Move FDMULQ " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 82/94] target/sparc: Move gen_fop_FD insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 83/94] target/sparc: Move FiTOd, FsTOd, FsTOx " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 84/94] target/sparc: Move FqTOs, FqTOi " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 85/94] target/sparc: Move FqTOd, FqTOx " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 86/94] target/sparc: Move FiTOq, FsTOq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 87/94] target/sparc: Move FdTOq, FxTOq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 88/94] target/sparc: Move FMOVq, FNEGq, FABSq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 89/94] target/sparc: Move FMOVR, FMOVcc, FMOVfcc " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 90/94] target/sparc: Convert FCMP, FCMPE " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 91/94] target/sparc: Move FPCMP* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 92/94] target/sparc: Move FPACK16, FPACKFIX " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 93/94] target/sparc: Convert FZERO, FONE " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 94/94] target/sparc: Remove disas_sparc_legacy Richard Henderson
2023-10-23 18:04 ` [PATCH v5 00/94] target/sparc: Convert to decodetree Mark Cave-Ayland
2023-10-23 22:41   ` Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231022232932.80507-48-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=mark.cave-ayland@ilande.co.uk \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).