From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH v5 55/94] target/sparc: Move SWAP, SWAPA to decodetree
Date: Sun, 22 Oct 2023 16:28:53 -0700 [thread overview]
Message-ID: <20231022232932.80507-56-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231022232932.80507-1-richard.henderson@linaro.org>
Remove gen_swap_asi.
Rename gen_swap_asi0 to gen_swap_asi.
Merge gen_swap into gen_swap_asi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/insns.decode | 4 +++
target/sparc/translate.c | 58 +++++++++++++++++----------------------
2 files changed, 29 insertions(+), 33 deletions(-)
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index 2f950000b5..9c4597317c 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -288,6 +288,10 @@ LDSTUB 11 ..... 001101 ..... . ............. @r_r_ri_na
LDSTUB 11 ..... 011101 ..... . ............. @r_r_r_asi # LDSTUBA
LDSTUB 11 ..... 011101 ..... . ............. @r_r_i_asi # LDSTUBA
+SWAP 11 ..... 001111 ..... . ............. @r_r_ri_na
+SWAP 11 ..... 011111 ..... . ............. @r_r_r_asi # SWAPA
+SWAP 11 ..... 011111 ..... . ............. @r_r_i_asi # SWAPA
+
NCP 10 ----- 110110 ----- --------- ----- # v8 CPop1
NCP 10 ----- 110111 ----- --------- ----- # v8 CPop2
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 3698e1a84d..6e9f9b8930 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -1885,13 +1885,6 @@ static void gen_ne_fop_QD(DisasContext *dc, int rd, int rs,
gen_update_fprs_dirty(dc, QFPREG(rd));
}
-static void gen_swap(DisasContext *dc, TCGv dst, TCGv src,
- TCGv addr, int mmu_idx, MemOp memop)
-{
- gen_address_mask(dc, addr);
- tcg_gen_atomic_xchg_tl(dst, addr, src, mmu_idx, memop | MO_ALIGN);
-}
-
/* asi moves */
typedef enum {
GET_ASI_HELPER,
@@ -2258,14 +2251,15 @@ static void gen_st_asi(DisasContext *dc, DisasASI *da, TCGv src, TCGv addr)
}
}
-static void gen_swap_asi0(DisasContext *dc, DisasASI *da,
- TCGv dst, TCGv src, TCGv addr)
+static void gen_swap_asi(DisasContext *dc, DisasASI *da,
+ TCGv dst, TCGv src, TCGv addr)
{
switch (da->type) {
case GET_ASI_EXCP:
break;
case GET_ASI_DIRECT:
- gen_swap(dc, dst, src, addr, da->mem_idx, da->memop);
+ tcg_gen_atomic_xchg_tl(dst, addr, src,
+ da->mem_idx, da->memop | MO_ALIGN);
break;
default:
/* ??? Should be DAE_invalid_asi. */
@@ -2274,15 +2268,6 @@ static void gen_swap_asi0(DisasContext *dc, DisasASI *da,
}
}
-static void __attribute__((unused))
-gen_swap_asi(DisasContext *dc, TCGv dst, TCGv src, TCGv addr, int insn)
-{
- DisasASI da = get_asi(dc, insn, MO_TEUL);
-
- gen_address_mask(dc, addr);
- gen_swap_asi0(dc, &da, dst, src, addr);
-}
-
static void gen_cas_asi0(DisasContext *dc, DisasASI *da,
TCGv oldv, TCGv newv, TCGv cmpv, TCGv addr)
{
@@ -4610,6 +4595,24 @@ static bool trans_LDSTUB(DisasContext *dc, arg_r_r_ri_asi *a)
return advance_pc(dc);
}
+static bool trans_SWAP(DisasContext *dc, arg_r_r_ri_asi *a)
+{
+ TCGv addr, dst, src;
+ DisasASI da;
+
+ addr = gen_ldst_addr(dc, a->rs1, a->imm, a->rs2_or_imm);
+ if (addr == NULL) {
+ return false;
+ }
+ da = resolve_asi(dc, a->asi, MO_TEUL);
+
+ dst = gen_dest_gpr(dc, a->rd);
+ src = gen_load_gpr(dc, a->rd);
+ gen_swap_asi(dc, &da, dst, src, addr);
+ gen_store_gpr(dc, a->rd, dst);
+ return advance_pc(dc);
+}
+
#define CHECK_IU_FEATURE(dc, FEATURE) \
if (!((dc)->def->features & CPU_FEATURE_ ## FEATURE)) \
goto illegal_insn;
@@ -4621,7 +4624,7 @@ static bool trans_LDSTUB(DisasContext *dc, arg_r_r_ri_asi *a)
static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
{
unsigned int opc, rs1, rs2, rd;
- TCGv cpu_src1;
+ TCGv cpu_src1 __attribute__((unused));
TCGv cpu_src2 __attribute__((unused));
TCGv_i32 cpu_src1_32, cpu_src2_32, cpu_dst_32;
TCGv_i64 cpu_src1_64, cpu_src2_64, cpu_dst_64;
@@ -5439,6 +5442,7 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0x9: /* ldsb, load signed byte */
case 0xa: /* ldsh, load signed halfword */
case 0xd: /* ldstub */
+ case 0x0f: /* swap */
case 0x10: /* lda, V9 lduwa, load word alternate */
case 0x11: /* lduba, load unsigned byte alternate */
case 0x12: /* lduha, load unsigned halfword alternate */
@@ -5446,25 +5450,13 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0x19: /* ldsba, load signed byte alternate */
case 0x1a: /* ldsha, load signed halfword alternate */
case 0x1d: /* ldstuba */
+ case 0x1f: /* swapa */
g_assert_not_reached(); /* in decodetree */
case 0x08: /* V9 ldsw */
case 0x0b: /* V9 ldx */
case 0x18: /* V9 ldswa */
case 0x1b: /* V9 ldxa */
goto illegal_insn; /* in decodetree */
- case 0x0f:
- /* swap, swap register with memory. Also atomically */
- cpu_src1 = gen_load_gpr(dc, rd);
- gen_swap(dc, cpu_val, cpu_src1, cpu_addr,
- dc->mem_idx, MO_TEUL);
- break;
-#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
- case 0x1f: /* swapa, swap reg with alt. memory. Also
- atomically */
- cpu_src1 = gen_load_gpr(dc, rd);
- gen_swap_asi(dc, cpu_val, cpu_src1, cpu_addr, insn);
- break;
-#endif
#ifdef TARGET_SPARC64
case 0x2d: /* V9 prefetch, no effect */
goto skip_move;
--
2.34.1
next prev parent reply other threads:[~2023-10-22 23:34 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-22 23:27 [PATCH v5 00/94] target/sparc: Convert to decodetree Richard Henderson
2023-10-22 23:27 ` [PATCH v5 01/94] target/sparc: Clear may_lookup for npc == DYNAMIC_PC Richard Henderson
2023-10-22 23:28 ` [PATCH v5 02/94] target/sparc: Implement check_align inline Richard Henderson
2023-10-22 23:28 ` [PATCH v5 03/94] target/sparc: Avoid helper_raise_exception in helper_st_asi Richard Henderson
2023-10-22 23:28 ` [PATCH v5 04/94] target/sparc: Set TCG_GUEST_DEFAULT_MO Richard Henderson
2023-10-22 23:28 ` [PATCH v5 05/94] configs: Enable MTTCG for sparc, sparc64 Richard Henderson
2023-10-22 23:28 ` [PATCH v5 06/94] target/sparc: Define features via cpu-feature.h.inc Richard Henderson
2023-10-22 23:28 ` [PATCH v5 07/94] target/sparc: Use CPU_FEATURE_BIT_* for cpu properties Richard Henderson
2023-10-22 23:28 ` [PATCH v5 08/94] target/sparc: Remove sparcv7 cpu features Richard Henderson
2023-10-22 23:28 ` [PATCH v5 09/94] target/sparc: Partition " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 10/94] target/sparc: Add decodetree infrastructure Richard Henderson
2023-10-22 23:28 ` [PATCH v5 11/94] target/sparc: Define AM_CHECK for sparc32 Richard Henderson
2023-10-22 23:28 ` [PATCH v5 12/94] target/sparc: Move CALL to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 13/94] target/sparc: Move BPcc and Bicc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 14/94] target/sparc: Move BPr " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 15/94] target/sparc: Move FBPfcc and FBfcc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 16/94] target/sparc: Merge gen_cond with only caller Richard Henderson
2023-10-22 23:28 ` [PATCH v5 17/94] target/sparc: Merge gen_fcond " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 18/94] target/sparc: Merge gen_branch_[an] " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 19/94] target/sparc: Pass DisasCompare to advance_jump_cond Richard Henderson
2023-10-22 23:28 ` [PATCH v5 20/94] target/sparc: Move SETHI to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 21/94] target/sparc: Move Tcc " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 22/94] target/sparc: Move RDASR, STBAR, MEMBAR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 23/94] target/sparc: Move RDPSR, RDHPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 24/94] target/sparc: Move RDWIM, RDPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 25/94] target/sparc: Move RDTBR, FLUSHW " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 26/94] target/sparc: Move WRASR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 27/94] target/sparc: Move WRPSR, SAVED, RESTORED " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 28/94] target/sparc: Move WRWIM, WRPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 29/94] target/sparc: Move WRTBR, WRHPR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 30/94] target/sparc: Remove cpu_wim Richard Henderson
2023-10-22 23:28 ` [PATCH v5 31/94] target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr Richard Henderson
2023-10-22 23:28 ` [PATCH v5 32/94] target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver Richard Henderson
2023-10-22 23:28 ` [PATCH v5 33/94] target/sparc: Move basic arithmetic to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 34/94] target/sparc: Move ADDC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 35/94] target/sparc: Move MULX " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 36/94] target/sparc: Move UMUL, SMUL " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 37/94] target/sparc: Move SUBC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 38/94] target/sparc: Move UDIVX, SDIVX " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 39/94] target/sparc: Move UDIV, SDIV " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 40/94] target/sparc: Move TADD, TSUB, MULS " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 41/94] target/sparc: Move SLL, SRL, SRA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 42/94] target/sparc: Move MOVcc, MOVR " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 43/94] target/sparc: Move POPC " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 44/94] target/sparc: Convert remaining v8 coproc insns " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 45/94] target/sparc: Move JMPL, RETT, RETURN " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 46/94] target/sparc: Move FLUSH, SAVE, RESTORE " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 47/94] target/sparc: Move DONE, RETRY " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 48/94] target/sparc: Split out resolve_asi Richard Henderson
2023-10-22 23:28 ` [PATCH v5 49/94] target/sparc: Drop ifdef around get_asi and friends Richard Henderson
2023-10-22 23:28 ` [PATCH v5 50/94] target/sparc: Split out ldst functions with asi pre-computed Richard Henderson
2023-10-22 23:28 ` [PATCH v5 51/94] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX Richard Henderson
2023-10-22 23:28 ` [PATCH v5 52/94] target/sparc: Move simple integer load/store to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 53/94] target/sparc: Move asi " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 54/94] target/sparc: Move LDSTUB, LDSTUBA " Richard Henderson
2023-10-22 23:28 ` Richard Henderson [this message]
2023-10-22 23:28 ` [PATCH v5 56/94] target/sparc: Move CASA, CASXA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 57/94] target/sparc: Move PREFETCH, PREFETCHA " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 58/94] target/sparc: Split out fp ldst functions with asi precomputed Richard Henderson
2023-10-22 23:28 ` [PATCH v5 59/94] target/sparc: Move simple fp load/store to decodetree Richard Henderson
2023-10-22 23:28 ` [PATCH v5 60/94] target/sparc: Move asi " Richard Henderson
2023-10-22 23:28 ` [PATCH v5 61/94] target/sparc: Move LDFSR, STFSR " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 62/94] target/sparc: Merge LDFSR, LDXFSR implementations Richard Henderson
2023-10-22 23:29 ` [PATCH v5 63/94] target/sparc: Move EDGE* to decodetree Richard Henderson
2023-10-22 23:29 ` [PATCH v5 64/94] target/sparc: Move ARRAY* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 65/94] target/sparc: Move ADDRALIGN* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 66/94] target/sparc: Move BMASK " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 67/94] target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 68/94] target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 69/94] target/sparc: Use tcg_gen_vec_{add,sub}* Richard Henderson
2023-10-22 23:29 ` [PATCH v5 70/94] target/sparc: Move gen_ne_fop_FFF insns to decodetree Richard Henderson
2023-10-22 23:29 ` [PATCH v5 71/94] target/sparc: Move gen_ne_fop_DDD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 72/94] target/sparc: Move PDIST " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 73/94] target/sparc: Move gen_gsr_fop_DDD insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 74/94] target/sparc: Move gen_fop_FF " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 75/94] target/sparc: Move gen_fop_DD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 76/94] target/sparc: Move FSQRTq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 77/94] target/sparc: Move gen_fop_FFF insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 78/94] target/sparc: Move gen_fop_DDD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 79/94] target/sparc: Move gen_fop_QQQ " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 80/94] target/sparc: Move FSMULD " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 81/94] target/sparc: Move FDMULQ " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 82/94] target/sparc: Move gen_fop_FD insns " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 83/94] target/sparc: Move FiTOd, FsTOd, FsTOx " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 84/94] target/sparc: Move FqTOs, FqTOi " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 85/94] target/sparc: Move FqTOd, FqTOx " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 86/94] target/sparc: Move FiTOq, FsTOq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 87/94] target/sparc: Move FdTOq, FxTOq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 88/94] target/sparc: Move FMOVq, FNEGq, FABSq " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 89/94] target/sparc: Move FMOVR, FMOVcc, FMOVfcc " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 90/94] target/sparc: Convert FCMP, FCMPE " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 91/94] target/sparc: Move FPCMP* " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 92/94] target/sparc: Move FPACK16, FPACKFIX " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 93/94] target/sparc: Convert FZERO, FONE " Richard Henderson
2023-10-22 23:29 ` [PATCH v5 94/94] target/sparc: Remove disas_sparc_legacy Richard Henderson
2023-10-23 18:04 ` [PATCH v5 00/94] target/sparc: Convert to decodetree Mark Cave-Ayland
2023-10-23 22:41 ` Richard Henderson
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