From: Andrew Jones <ajones@ventanamicro.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
qemu-devel@nongnu.org, "Shannon Zhao" <shannon.zhaosl@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Ani Sinha" <anisinha@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Anup Patel" <apatel@ventanamicro.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Haibo Xu" <haibo1.xu@intel.com>
Subject: Re: [PATCH v3 08/12] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT
Date: Mon, 23 Oct 2023 15:15:31 +0200 [thread overview]
Message-ID: <20231023-03c45516db7d8bf69f5eaf4c@orel> (raw)
In-Reply-To: <20231019132648.23703-9-sunilvl@ventanamicro.com>
On Thu, Oct 19, 2023 at 06:56:44PM +0530, Sunil V L wrote:
> MMU type information is available via MMU node in RHCT. Add this node in
> RHCT.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
> hw/riscv/virt-acpi-build.c | 36 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index bf47eef792..4895c9669d 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -159,6 +159,8 @@ static void build_rhct(GArray *table_data,
> size_t len, aligned_len;
> uint32_t isa_offset, num_rhct_nodes, cmo_offset = 0;
> RISCVCPU *cpu = &s->soc[0].harts[0];
> + uint32_t mmu_offset = 0;
> + uint8_t satp_mode_max;
> char *isa;
>
> AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
> @@ -178,6 +180,10 @@ static void build_rhct(GArray *table_data,
> num_rhct_nodes++;
> }
>
> + if (cpu->cfg.satp_mode.supported != 0) {
> + num_rhct_nodes++;
> + }
> +
> /* Number of RHCT nodes*/
> build_append_int_noprefix(table_data, num_rhct_nodes, 4);
>
> @@ -203,6 +209,26 @@ static void build_rhct(GArray *table_data,
> build_append_int_noprefix(table_data, 0x0, 1); /* Optional Padding */
> }
>
> + /* MMU node structure */
> + if (cpu->cfg.satp_mode.supported != 0) {
> + satp_mode_max = satp_mode_max_from_map(cpu->cfg.satp_mode.map);
> + mmu_offset = table_data->len - table.table_offset;
> + build_append_int_noprefix(table_data, 2, 2); /* Type */
> + build_append_int_noprefix(table_data, 8, 2); /* Total Length */
The comment for the above line should be "Length"
> + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
> + build_append_int_noprefix(table_data, 0, 1); /* Reserved */
> + /* Virtual Address Scheme */
The above comment should be "MMU Type"
> + if (satp_mode_max == VM_1_10_SV57) {
> + build_append_int_noprefix(table_data, 2, 1); /* Sv57 */
> + } else if (satp_mode_max == VM_1_10_SV48) {
> + build_append_int_noprefix(table_data, 1, 1); /* Sv48 */
> + } else if (satp_mode_max == VM_1_10_SV39) {
> + build_append_int_noprefix(table_data, 0, 1); /* Sv39 */
> + } else {
> + assert(1);
> + }
> + }
> +
> /* CMO node */
> if (cpu->cfg.ext_zicbom || cpu->cfg.ext_zicboz) {
> cmo_offset = table_data->len - table.table_offset;
> @@ -245,6 +271,11 @@ static void build_rhct(GArray *table_data,
> num_offsets++;
> }
>
> + if (mmu_offset) {
> + len += 4;
> + num_offsets++;
> + }
> +
> build_append_int_noprefix(table_data, len, 2);
> build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
> /* Number of offsets */
> @@ -253,9 +284,14 @@ static void build_rhct(GArray *table_data,
>
> /* Offsets */
> build_append_int_noprefix(table_data, isa_offset, 4);
> +
> if (cmo_offset) {
> build_append_int_noprefix(table_data, cmo_offset, 4);
> }
> +
> + if (mmu_offset) {
> + build_append_int_noprefix(table_data, mmu_offset, 4);
> + }
I'd put the mmu_offset above the cmo_offset so the offsets are in
ascending order.
> }
>
> acpi_table_end(linker, &table);
> --
> 2.34.1
>
Thanks,
drew
next prev parent reply other threads:[~2023-10-23 13:16 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-19 13:26 [PATCH v3 00/12] RISC-V: ACPI: Enable AIA, PLIC and update RHCT Sunil V L
2023-10-19 13:26 ` [PATCH v3 01/12] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location Sunil V L
2023-10-23 12:22 ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 02/12] hw/arm/virt-acpi-build.c: Migrate virtio " Sunil V L
2023-10-20 11:42 ` Daniel Henrique Barboza
2023-10-23 12:28 ` Andrew Jones
2023-10-25 20:03 ` Sunil V L
2023-10-19 13:26 ` [PATCH v3 03/12] hw/riscv: virt: Make few IMSIC macros and functions public Sunil V L
2023-10-23 12:31 ` Andrew Jones
2023-10-19 13:26 ` [PATCH v3 04/12] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC Sunil V L
2023-10-24 0:07 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 05/12] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT Sunil V L
2023-10-23 12:42 ` Andrew Jones
2023-10-24 0:10 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 06/12] hw/riscv/virt-acpi-build.c: Add APLIC " Sunil V L
2023-10-23 12:46 ` Andrew Jones
2023-10-24 0:10 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 07/12] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT Sunil V L
2023-10-23 12:51 ` Andrew Jones
2023-10-23 13:17 ` Andrew Jones
2023-10-24 0:12 ` Alistair Francis
2023-10-19 13:26 ` [PATCH v3 08/12] hw/riscv/virt-acpi-build.c: Add MMU node " Sunil V L
2023-10-23 13:15 ` Andrew Jones [this message]
2023-10-19 13:26 ` [PATCH v3 09/12] hw/pci-host/gpex: Define properties for MMIO ranges Sunil V L
2023-10-19 13:26 ` [PATCH v3 10/12] hw/riscv/virt: Update GPEX MMIO related properties Sunil V L
2023-10-20 11:47 ` Daniel Henrique Barboza
2023-10-19 13:26 ` [PATCH v3 11/12] hw/riscv/virt-acpi-build.c: Add IO controllers and devices Sunil V L
2023-10-19 13:26 ` [PATCH v3 12/12] hw/riscv/virt-acpi-build.c: Add PLIC in MADT Sunil V L
2023-10-20 11:49 ` Daniel Henrique Barboza
2023-10-23 13:22 ` Andrew Jones
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