From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
qemu-ppc@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [RFC PATCH 9/9] target/ppc: Use tcg_gen_sextract_tl
Date: Mon, 23 Oct 2023 18:09:44 +0200 [thread overview]
Message-ID: <20231023160944.10692-10-philmd@linaro.org> (raw)
In-Reply-To: <20231023160944.10692-1-philmd@linaro.org>
Inspired-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
RFC: Please double-check 32/64 & bits
---
target/ppc/translate.c | 22 ++++------------------
1 file changed, 4 insertions(+), 18 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index c6e1f7c2ca..1370db9bd5 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -2892,13 +2892,7 @@ static void gen_slw(DisasContext *ctx)
t0 = tcg_temp_new();
/* AND rS with a mask that is 0 when rB >= 0x20 */
-#if defined(TARGET_PPC64)
- tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x3a);
- tcg_gen_sari_tl(t0, t0, 0x3f);
-#else
- tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1a);
- tcg_gen_sari_tl(t0, t0, 0x1f);
-#endif
+ tcg_gen_sextract_tl(t0, cpu_gpr[rB(ctx->opcode)], 5, 1);
tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0);
t1 = tcg_temp_new();
tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x1f);
@@ -2956,13 +2950,7 @@ static void gen_srw(DisasContext *ctx)
t0 = tcg_temp_new();
/* AND rS with a mask that is 0 when rB >= 0x20 */
-#if defined(TARGET_PPC64)
- tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x3a);
- tcg_gen_sari_tl(t0, t0, 0x3f);
-#else
- tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1a);
- tcg_gen_sari_tl(t0, t0, 0x1f);
-#endif
+ tcg_gen_sextract_tl(t0, cpu_gpr[rB(ctx->opcode)], 5, 1);
tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0);
tcg_gen_ext32u_tl(t0, t0);
t1 = tcg_temp_new();
@@ -2981,8 +2969,7 @@ static void gen_sld(DisasContext *ctx)
t0 = tcg_temp_new();
/* AND rS with a mask that is 0 when rB >= 0x40 */
- tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x39);
- tcg_gen_sari_tl(t0, t0, 0x3f);
+ tcg_gen_sextract_tl(t0, cpu_gpr[rB(ctx->opcode)], 6, 1);
tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0);
t1 = tcg_temp_new();
tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x3f);
@@ -3071,8 +3058,7 @@ static void gen_srd(DisasContext *ctx)
t0 = tcg_temp_new();
/* AND rS with a mask that is 0 when rB >= 0x40 */
- tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x39);
- tcg_gen_sari_tl(t0, t0, 0x3f);
+ tcg_gen_sextract_tl(t0, cpu_gpr[rB(ctx->opcode)], 6, 1);
tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0);
t1 = tcg_temp_new();
tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x3f);
--
2.41.0
next prev parent reply other threads:[~2023-10-23 16:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 16:09 [PATCH 0/9] tcg: Use tcg_gen_[s]extract_{i32,i64,tl} Philippe Mathieu-Daudé
2023-10-23 16:09 ` [PATCH 1/9] target/avr: Use tcg_gen_extract_tl Philippe Mathieu-Daudé
2023-10-23 23:32 ` Richard Henderson
2023-10-24 7:21 ` Michael Rolnik
2023-10-23 16:09 ` [PATCH 2/9] target/cris: " Philippe Mathieu-Daudé
2023-10-23 23:36 ` Richard Henderson
2023-10-24 8:44 ` Edgar E. Iglesias
2023-10-23 16:09 ` [PATCH 3/9] target/mips: Use tcg_gen_extract_i32 Philippe Mathieu-Daudé
2023-10-23 23:39 ` Richard Henderson
2023-10-23 16:09 ` [PATCH 4/9] target/ppc: " Philippe Mathieu-Daudé
2023-10-23 23:40 ` Richard Henderson
2023-10-23 16:09 ` [PATCH 5/9] target/sparc: Use tcg_gen_extract_tl Philippe Mathieu-Daudé
2023-10-23 23:41 ` Richard Henderson
2023-10-23 16:09 ` [PATCH 6/9] target/xtensa: Use tcg_gen_extract_i32 Philippe Mathieu-Daudé
2023-10-23 17:56 ` Max Filippov
2023-10-23 16:09 ` [PATCH 7/9] target/mips: Use tcg_gen_sextract_tl Philippe Mathieu-Daudé
2023-10-24 0:14 ` Richard Henderson
2023-10-24 8:57 ` Philippe Mathieu-Daudé
2023-10-24 16:55 ` Philippe Mathieu-Daudé
2023-10-23 16:09 ` [RFC PATCH 8/9] target/cris: " Philippe Mathieu-Daudé
2023-10-24 0:26 ` Richard Henderson
2023-10-24 8:42 ` Edgar E. Iglesias
2023-10-24 8:53 ` Philippe Mathieu-Daudé
2023-10-24 8:58 ` Philippe Mathieu-Daudé
2023-10-23 16:09 ` Philippe Mathieu-Daudé [this message]
2023-10-24 1:04 ` [RFC PATCH 9/9] target/ppc: " Richard Henderson
2023-10-25 7:09 ` Nicholas Piggin
2023-10-25 7:33 ` Philippe Mathieu-Daudé
2023-10-25 20:26 ` Richard Henderson
2023-10-25 7:38 ` Richard Henderson
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