From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Thomas Huth" <huth@tuxfamily.org>,
"Laurent Vivier" <laurent@vivier.eu>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH v2 2/6] hw/m68k/mcf5206: Pass CPU using QOM link property
Date: Tue, 24 Oct 2023 10:30:05 +0200 [thread overview]
Message-ID: <20231024083010.12453-3-philmd@linaro.org> (raw)
In-Reply-To: <20231024083010.12453-1-philmd@linaro.org>
Avoid the interrupt controller directly access the first cpu via
the qemu_get_cpu() call. Pass it as argument to mcf5206_init()
from the board code.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/m68k/an5206.c | 6 ++++--
hw/m68k/mcf5206.c | 9 ++++++++-
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c
index 11ae4c9795..1e8e64f8bd 100644
--- a/hw/m68k/an5206.c
+++ b/hw/m68k/an5206.c
@@ -20,12 +20,14 @@
#define AN5206_MBAR_ADDR 0x10000000
#define AN5206_RAMBAR_ADDR 0x20000000
-static void mcf5206_init(MemoryRegion *sysmem, uint32_t base)
+static void mcf5206_init(M68kCPU *cpu, MemoryRegion *sysmem, uint32_t base)
{
DeviceState *dev;
SysBusDevice *s;
dev = qdev_new(TYPE_MCF5206_MBAR);
+ object_property_set_link(OBJECT(dev), "m68k-cpu",
+ OBJECT(cpu), &error_abort);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
@@ -60,7 +62,7 @@ static void an5206_init(MachineState *machine)
memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_fatal);
memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);
- mcf5206_init(address_space_mem, AN5206_MBAR_ADDR);
+ mcf5206_init(cpu, address_space_mem, AN5206_MBAR_ADDR);
/* Load kernel. */
if (!kernel_filename) {
diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index 2ab1b4f059..f920ca2ceb 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -10,6 +10,7 @@
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "cpu.h"
+#include "hw/qdev-properties.h"
#include "hw/boards.h"
#include "hw/irq.h"
#include "hw/m68k/mcf.h"
@@ -601,13 +602,19 @@ static void mcf5206_mbar_realize(DeviceState *dev, Error **errp)
s->timer[1] = m5206_timer_init(s->pic[10]);
s->uart[0] = mcf_uart_init(s->pic[12], serial_hd(0));
s->uart[1] = mcf_uart_init(s->pic[13], serial_hd(1));
- s->cpu = M68K_CPU(qemu_get_cpu(0));
}
+static Property mcf5206_mbar_properties[] = {
+ DEFINE_PROP_LINK("m68k-cpu", m5206_mbar_state, cpu,
+ TYPE_M68K_CPU, M68kCPU *),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void mcf5206_mbar_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ device_class_set_props(dc, mcf5206_mbar_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->desc = "MCF5206 system integration module";
dc->realize = mcf5206_mbar_realize;
--
2.41.0
next prev parent reply other threads:[~2023-10-24 8:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-24 8:30 [PATCH v2 0/6] hw/m68k: Strengthen QOM/SysBus API uses Philippe Mathieu-Daudé
2023-10-24 8:30 ` [PATCH v2 1/6] hw/m68k/irqc: Pass CPU using QOM link property Philippe Mathieu-Daudé
2023-10-24 8:30 ` Philippe Mathieu-Daudé [this message]
2023-10-24 8:30 ` [PATCH v2 3/6] hw/m68k/mcf_intc: Expose MMIO region via SysBus API Philippe Mathieu-Daudé
2023-10-24 8:30 ` [PATCH v2 4/6] hw/m68k/mcf_intc: Pass CPU using QOM link property Philippe Mathieu-Daudé
2023-10-24 8:30 ` [PATCH v2 5/6] hw/m68k/next-cube: Do not open-code sysbus_create_simple() Philippe Mathieu-Daudé
2023-10-24 8:30 ` [PATCH v2 6/6] hw/m68k/virt: " Philippe Mathieu-Daudé
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