From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: philmd@linaro.org
Subject: [PATCH 16/29] tcg/riscv: Support TCG_COND_TST{EQ,NE}
Date: Wed, 25 Oct 2023 00:26:54 -0700 [thread overview]
Message-ID: <20231025072707.833943-17-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231025072707.833943-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/riscv/tcg-target.c.inc | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 34e10e77d9..3997e2f274 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -798,8 +798,14 @@ static const struct {
static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
TCGReg arg2, TCGLabel *l)
{
- RISCVInsn op = tcg_brcond_to_riscv[cond].op;
+ RISCVInsn op;
+ if (is_tst_cond(cond)) {
+ tcg_out_opc_reg(s, OPC_AND, TCG_REG_TMP0, arg1, arg2);
+ cond = tcg_tst_eqne_cond(cond);
+ }
+
+ op = tcg_brcond_to_riscv[cond].op;
tcg_debug_assert(op != 0);
if (tcg_brcond_to_riscv[cond].swap) {
@@ -827,6 +833,7 @@ static int tcg_out_setcond_int(TCGContext *s, TCGCond cond, TCGReg ret,
case TCG_COND_GEU: /* -> LTU */
case TCG_COND_GT: /* -> LE */
case TCG_COND_GTU: /* -> LEU */
+ case TCG_COND_TSTEQ: /* -> TSTNE */
cond = tcg_invert_cond(cond);
flags ^= SETCOND_INV;
break;
@@ -886,6 +893,15 @@ static int tcg_out_setcond_int(TCGContext *s, TCGCond cond, TCGReg ret,
}
break;
+ case TCG_COND_TSTNE:
+ flags |= SETCOND_NEZ;
+ if (c2) {
+ tcg_out_opc_imm(s, OPC_ANDI, ret, arg1, arg2);
+ } else {
+ tcg_out_opc_reg(s, OPC_AND, ret, arg1, arg2);
+ }
+ break;
+
case TCG_COND_LT:
if (c2) {
tcg_out_opc_imm(s, OPC_SLTI, ret, arg1, arg2);
@@ -1079,7 +1095,7 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret,
int tmpflags;
TCGReg t;
- if (!have_zicond && (!c_cmp2 || cmp2 == 0)) {
+ if (!have_zicond && (!c_cmp2 || cmp2 == 0) && !is_tst_cond(cond)) {
tcg_out_movcond_br2(s, cond, ret, cmp1, cmp2,
val1, c_val1, val2, c_val2);
return;
--
2.34.1
next prev parent reply other threads:[~2023-10-25 7:32 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-25 7:26 [PATCH 00/29] tcg: Introduce TCG_COND_TST{EQ,NE} Richard Henderson
2023-10-25 7:26 ` [PATCH 01/29] " Richard Henderson
2023-10-25 7:26 ` [PATCH 02/29] tcg/optimize: Split out arg_is_const_val Richard Henderson
2023-10-25 16:20 ` Philippe Mathieu-Daudé
2023-10-25 7:26 ` [PATCH 03/29] tcg/optimize: Split out do_constant_folding_cond1 Richard Henderson
2023-10-25 7:26 ` [PATCH 04/29] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2 Richard Henderson
2023-10-25 7:26 ` [PATCH 05/29] tcg/optimize: Split out arg_new_constant Richard Henderson
2023-10-25 16:22 ` Philippe Mathieu-Daudé
2023-10-25 7:26 ` [PATCH 06/29] tcg/optimize: Handle TCG_COND_TST{EQ,NE} Richard Henderson
2023-10-25 7:26 ` [PATCH 07/29] tcg/aarch64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2023-10-25 7:26 ` [PATCH 08/29] tcg/aarch64: Generate TBZ, TBNZ Richard Henderson
2023-10-25 7:26 ` [PATCH 09/29] tcg/arm: Support TCG_COND_TST{EQ,NE} Richard Henderson
2023-10-25 7:26 ` [PATCH 10/29] tcg/i386: Pass x86 condition codes to tcg_out_cmov Richard Henderson
2023-10-25 7:26 ` [PATCH 11/29] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp Richard Henderson
2023-10-25 7:26 ` [PATCH 12/29] tcg/i386: Add rexw argument to tcg_out_testi Richard Henderson
2023-10-25 7:26 ` [PATCH 13/29] tcg/i386: Support TCG_COND_TST{EQ,NE} Richard Henderson
2023-10-25 7:26 ` [PATCH 14/29] tcg/loongarch64: " Richard Henderson
2023-10-25 7:26 ` [PATCH 15/29] tcg/mips: " Richard Henderson
2023-10-25 7:26 ` Richard Henderson [this message]
2023-10-25 7:26 ` [PATCH 17/29] tcg/sparc64: Implement tcg_out_extrl_i64_i32 Richard Henderson
2023-10-25 7:26 ` [PATCH 18/29] tcg/sparc64: Hoist read of tcg_cond_to_rcond Richard Henderson
2023-10-25 7:26 ` [PATCH 19/29] tcg/sparc64: Pass TCGCond to tcg_out_cmp Richard Henderson
2023-10-25 7:26 ` [PATCH 20/29] tcg/sparc64: Support TCG_COND_TST{EQ,NE} Richard Henderson
2023-10-25 7:26 ` [PATCH 21/29] tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc Richard Henderson
2023-10-25 7:27 ` [PATCH 22/29] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel Richard Henderson
2023-10-25 7:27 ` [PATCH 23/29] tcg/ppc: Create tcg_out_and_rc Richard Henderson
2023-10-25 7:27 ` [PATCH 24/29] tcg/ppc: Support TCG_COND_TST{EQ,NE} Richard Henderson
2023-10-25 7:27 ` [PATCH 25/29] tcg/s390x: " Richard Henderson
2023-10-25 7:27 ` [PATCH 26/29] tcg/tci: " Richard Henderson
2023-10-25 7:27 ` [PATCH 27/29] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S} Richard Henderson
2023-10-25 7:27 ` [PATCH 28/29] target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S} Richard Henderson
2023-10-25 7:27 ` [PATCH 29/29] target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero Richard Henderson
-- strict thread matches above, loose matches on Subject: below --
2023-10-26 0:13 [PULL 00/94] target/sparc: Convert to decodetree Richard Henderson
2023-10-26 0:14 ` [PATCH 16/29] tcg/riscv: Support TCG_COND_TST{EQ,NE} Richard Henderson
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