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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Ani Sinha <anisinha@redhat.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	David Hildenbrand <david@redhat.com>
Subject: [PULL 07/24] target/i386: check CPUID_PAE to determine 36 bit processor address space
Date: Thu, 26 Oct 2023 01:27:00 +0200	[thread overview]
Message-ID: <20231025232718.89428-8-pbonzini@redhat.com> (raw)
In-Reply-To: <20231025232718.89428-1-pbonzini@redhat.com>

From: Ani Sinha <anisinha@redhat.com>

PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the
guest processor and set phys_bits to 36 if PAE feature is set. This is in
addition to checking the presence of PSE36 CPUID feature for setting 36 bit
phys_bits.

Signed-off-by: Ani Sinha <anisinha@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-ID: <20230912120650.371781-1-anisinha@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 070c02000fe..fc8484cb5e8 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7377,7 +7377,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
             return;
         }
 
-        if (env->features[FEAT_1_EDX] & CPUID_PSE36) {
+        if (env->features[FEAT_1_EDX] & (CPUID_PSE36 | CPUID_PAE)) {
             cpu->phys_bits = 36;
         } else {
             cpu->phys_bits = 32;
-- 
2.41.0



  parent reply	other threads:[~2023-10-25 23:30 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-25 23:26 [PULL 00/24] x86, KVM changes for 2023-10-26 Paolo Bonzini
2023-10-25 23:26 ` [PULL 01/24] tests/tcg: fix out-of-bounds access in test-avx Paolo Bonzini
2023-10-25 23:26 ` [PULL 02/24] target/i386: implement SHA instructions Paolo Bonzini
2023-10-25 23:26 ` [PULL 03/24] tests/tcg/i386: initialize more registers in test-avx Paolo Bonzini
2023-10-25 23:26 ` [PULL 04/24] tests/tcg/i386: test-avx: add test cases for SHA new instructions Paolo Bonzini
2023-10-25 23:26 ` [PULL 05/24] target/i386: group common checks in the decoding phase Paolo Bonzini
2023-10-25 23:26 ` [PULL 06/24] target/i386: validate VEX.W for AVX instructions Paolo Bonzini
2023-10-25 23:27 ` Paolo Bonzini [this message]
2023-10-25 23:27 ` [PULL 08/24] kvm: remove unnecessary stub Paolo Bonzini
2023-10-25 23:27 ` [PULL 09/24] kvm: require KVM_CAP_INTERNAL_ERROR_DATA Paolo Bonzini
2023-10-25 23:27 ` [PULL 10/24] kvm: require KVM_CAP_SIGNAL_MSI Paolo Bonzini
2023-10-25 23:27 ` [PULL 11/24] kvm: require KVM_IRQFD for kernel irqchip Paolo Bonzini
2023-10-25 23:27 ` [PULL 12/24] " Paolo Bonzini
2023-10-25 23:27 ` [PULL 13/24] kvm: drop reference to KVM_CAP_PCI_2_3 Paolo Bonzini
2023-10-25 23:27 ` [PULL 14/24] kvm: assume that many ioeventfds can be created Paolo Bonzini
2023-10-25 23:27 ` [PULL 15/24] kvm: require KVM_CAP_IOEVENTFD and KVM_CAP_IOEVENTFD_ANY_LENGTH Paolo Bonzini
2023-10-25 23:27 ` [PULL 16/24] kvm: unify listeners for PIO address space Paolo Bonzini
2023-10-25 23:27 ` [PULL 17/24] kvm: i386: move KVM_CAP_IRQ_ROUTING detection to kvm_arch_required_capabilities Paolo Bonzini
2023-10-25 23:27 ` [PULL 18/24] kvm: i386: require KVM_CAP_DEBUGREGS Paolo Bonzini
2023-10-25 23:27 ` [PULL 19/24] kvm: i386: require KVM_CAP_XSAVE Paolo Bonzini
2023-10-25 23:27 ` [PULL 20/24] kvm: i386: require KVM_CAP_SET_VCPU_EVENTS and KVM_CAP_X86_ROBUST_SINGLESTEP Paolo Bonzini
2023-10-25 23:27 ` [PULL 21/24] kvm: i386: require KVM_CAP_MCE Paolo Bonzini
2023-10-25 23:27 ` [PULL 22/24] kvm: i386: require KVM_CAP_ADJUST_CLOCK Paolo Bonzini
2023-10-25 23:27 ` [PULL 23/24] kvm: i386: require KVM_CAP_SET_IDENTITY_MAP_ADDR Paolo Bonzini
2023-10-25 23:27 ` [PULL 24/24] kvm: i8254: require KVM_CAP_PIT2 and KVM_CAP_PIT_STATE2 Paolo Bonzini

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