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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id o6-20020a5d6706000000b003232380ffd7sm3661996wru.102.2023.11.01.02.19.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Nov 2023 02:19:26 -0700 (PDT) Date: Wed, 1 Nov 2023 10:19:25 +0100 From: Andrew Jones To: Daniel Henrique Barboza Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com Subject: Re: [PATCH v7 16/16] riscv-qmp-cmds.c: add profile flags in cpu-model-expansion Message-ID: <20231101-7e45796c91beaf0972b55f7d@orel> References: <20231031203916.197332-1-dbarboza@ventanamicro.com> <20231031203916.197332-17-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231031203916.197332-17-dbarboza@ventanamicro.com> Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=ajones@ventanamicro.com; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Oct 31, 2023 at 05:39:16PM -0300, Daniel Henrique Barboza wrote: > Expose all profile flags for all CPUs when executing > query-cpu-model-expansion. This will allow callers to quickly determine > if a certain profile is implemented by a given CPU. This includes > vendor CPUs - the fact that they don't have profile user flags doesn't > mean that they don't implement the profile. > > After this change it's possible to quickly determine if our stock CPUs > implement the existing rva22u64 profile. Here's a few examples: > > $ ./build/qemu-system-riscv64 -S -M virt -display none > -qmp tcp:localhost:1234,server,wait=off > > $ ./scripts/qmp/qmp-shell localhost:1234 > Welcome to the QMP low-level shell! > Connected to QEMU 8.1.50 > > - As expected, the 'max' CPU implements the rva22u64 profile. > > (QEMU) query-cpu-model-expansion type=full model={"name":"max"} > {"return": {"model": > {"name": "rv64", "props": {... "rva22u64": true, ...}}}} > > - rv64 is missing "zba", "zbb", "zbs", "zkt" and "zfhmin": > > query-cpu-model-expansion type=full model={"name":"rv64"} > {"return": {"model": > {"name": "rv64", "props": {... "rva22u64": false, ...}}}} > > query-cpu-model-expansion type=full model={"name":"rv64", > "props":{"zba":true,"zbb":true,"zbs":true,"zkt":true,"zfhmin":true}} > {"return": {"model": > {"name": "rv64", "props": {... "rva22u64": true, ...}}}} Nice! > > We have no vendor CPUs that supports rva22u64 (veyron-v1 is the closest > - it is missing just 'zkt'). > > In short, aside from the 'max' CPU, we have no CPUs that supports > rva22u64 by default. > > Signed-off-by: Daniel Henrique Barboza > --- > target/riscv/riscv-qmp-cmds.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c > index 5ada279776..205aaabeb9 100644 > --- a/target/riscv/riscv-qmp-cmds.c > +++ b/target/riscv/riscv-qmp-cmds.c > @@ -116,6 +116,19 @@ static void riscv_obj_add_named_feats_qdict(Object *obj, QDict *qdict_out) > } > } > > +static void riscv_obj_add_profiles_qdict(Object *obj, QDict *qdict_out) > +{ > + RISCVCPUProfile *profile; > + QObject *value; > + > + for (int i = 0; riscv_profiles[i] != NULL; i++) { > + profile = riscv_profiles[i]; > + value = QOBJECT(qbool_from_bool(profile->enabled)); > + > + qdict_put_obj(qdict_out, profile->name, value); > + } > +} > + > static void riscv_cpuobj_validate_qdict_in(Object *obj, QObject *props, > const QDict *qdict_in, > Error **errp) > @@ -220,6 +233,7 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type, > riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_experimental_exts); > riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_vendor_exts); > riscv_obj_add_named_feats_qdict(obj, qdict_out); > + riscv_obj_add_profiles_qdict(obj, qdict_out); > > /* Add our CPU boolean options too */ > riscv_obj_add_qdict_prop(obj, qdict_out, "mmu"); > -- > 2.41.0 > Reviewed-by: Andrew Jones