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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk
Subject: [PATCH v2 14/21] target/sparc: Merge advance_jump_uncond_{never, always} into advance_jump_cond
Date: Tue, 31 Oct 2023 21:11:25 -0700	[thread overview]
Message-ID: <20231101041132.174501-15-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231101041132.174501-1-richard.henderson@linaro.org>

Handle these via TCG_COND_{ALWAYS,NEVER}.
Allow dc->npc to be variable, using gen_mov_pc_npc.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/translate.c | 74 ++++++++++++++++------------------------
 1 file changed, 30 insertions(+), 44 deletions(-)

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index e134ba8821..cbee5435a3 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2378,37 +2378,37 @@ static bool advance_pc(DisasContext *dc)
  * Major opcodes 00 and 01 -- branches, call, and sethi
  */
 
-static bool advance_jump_uncond_never(DisasContext *dc, bool annul)
-{
-    if (annul) {
-        dc->pc = dc->npc + 4;
-        dc->npc = dc->pc + 4;
-    } else {
-        dc->pc = dc->npc;
-        dc->npc = dc->pc + 4;
-    }
-    return true;
-}
-
-static bool advance_jump_uncond_always(DisasContext *dc, bool annul,
-                                       target_ulong dest)
-{
-    if (annul) {
-        dc->pc = dest;
-        dc->npc = dest + 4;
-    } else {
-        dc->pc = dc->npc;
-        dc->npc = dest;
-        tcg_gen_mov_tl(cpu_pc, cpu_npc);
-    }
-    return true;
-}
-
 static bool advance_jump_cond(DisasContext *dc, DisasCompare *cmp,
                               bool annul, target_ulong dest)
 {
     target_ulong npc;
 
+    if (cmp->cond == TCG_COND_ALWAYS) {
+        if (annul) {
+            dc->pc = dest;
+            dc->npc = dest + 4;
+        } else {
+            gen_mov_pc_npc(dc);
+            dc->npc = dest;
+        }
+        return true;
+    }
+
+    if (cmp->cond == TCG_COND_NEVER) {
+        npc = dc->npc;
+        if (npc & 3) {
+            gen_mov_pc_npc(dc);
+            if (annul) {
+                tcg_gen_addi_tl(cpu_pc, cpu_pc, 4);
+            }
+            tcg_gen_addi_tl(cpu_npc, cpu_pc, 4);
+        } else {
+            dc->pc = npc + (annul ? 4 : 0);
+            dc->npc = dc->pc + 4;
+        }
+        return true;
+    }
+
     flush_cond(dc);
     npc = dc->npc;
 
@@ -2478,15 +2478,8 @@ static bool do_bpcc(DisasContext *dc, arg_bcc *a)
     target_long target = address_mask_i(dc, dc->pc + a->i * 4);
     DisasCompare cmp;
 
-    switch (a->cond) {
-    case 0x0:
-        return advance_jump_uncond_never(dc, a->a);
-    case 0x8:
-        return advance_jump_uncond_always(dc, a->a, target);
-    default:
-        gen_compare(&cmp, a->cc, a->cond, dc);
-        return advance_jump_cond(dc, &cmp, a->a, target);
-    }
+    gen_compare(&cmp, a->cc, a->cond, dc);
+    return advance_jump_cond(dc, &cmp, a->a, target);
 }
 
 TRANS(Bicc, ALL, do_bpcc, a)
@@ -2500,15 +2493,8 @@ static bool do_fbpfcc(DisasContext *dc, arg_bcc *a)
     if (gen_trap_ifnofpu(dc)) {
         return true;
     }
-    switch (a->cond) {
-    case 0x0:
-        return advance_jump_uncond_never(dc, a->a);
-    case 0x8:
-        return advance_jump_uncond_always(dc, a->a, target);
-    default:
-        gen_fcompare(&cmp, a->cc, a->cond);
-        return advance_jump_cond(dc, &cmp, a->a, target);
-    }
+    gen_fcompare(&cmp, a->cc, a->cond);
+    return advance_jump_cond(dc, &cmp, a->a, target);
 }
 
 TRANS(FBPfcc,  64, do_fbpfcc, a)
-- 
2.34.1



  parent reply	other threads:[~2023-11-01  4:12 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-01  4:11 [PATCH v2 00/21] target/sparc: Cleanup condition codes etc Richard Henderson
2023-11-01  4:11 ` [PATCH v2 01/21] target/sparc: Introduce cpu_put_psr_icc Richard Henderson
2023-11-01  4:11 ` [PATCH v2 02/21] target/sparc: Split psr and xcc into components Richard Henderson
2023-11-01  4:11 ` [PATCH v2 03/21] target/sparc: Remove CC_OP_LOGIC Richard Henderson
2023-11-01  4:11 ` [PATCH v2 04/21] target/sparc: Remove CC_OP_DIV Richard Henderson
2023-11-01  4:11 ` [PATCH v2 05/21] target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD Richard Henderson
2023-11-01  4:11 ` [PATCH v2 06/21] target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB Richard Henderson
2023-11-01  4:11 ` [PATCH v2 07/21] target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV Richard Henderson
2023-11-01  4:11 ` [PATCH v2 08/21] target/sparc: Remove CC_OP leftovers Richard Henderson
2023-11-01  4:11 ` [PATCH v2 09/21] target/sparc: Remove DisasCompare.is_bool Richard Henderson
2023-11-01  4:11 ` [PATCH v2 10/21] target/sparc: Change DisasCompare.c2 to int Richard Henderson
2023-11-01  4:11 ` [PATCH v2 11/21] target/sparc: Always copy conditions into a new temporary Richard Henderson
2023-11-01  4:11 ` [PATCH v2 12/21] target/sparc: Do flush_cond in advance_jump_cond Richard Henderson
2023-11-01  4:11 ` [PATCH v2 13/21] target/sparc: Merge gen_branch2 into advance_pc Richard Henderson
2023-11-01  4:11 ` Richard Henderson [this message]
2023-11-01  4:11 ` [PATCH v2 15/21] target/sparc: Pass displacement to advance_jump_cond Richard Henderson
2023-11-01  4:11 ` [PATCH v2 16/21] target/sparc: Merge gen_op_next_insn into only caller Richard Henderson
2023-11-01  4:11 ` [PATCH v2 17/21] target/sparc: Record entire jump condition in DisasContext Richard Henderson
2023-11-01  4:11 ` [PATCH v2 18/21] target/sparc: Discard cpu_cond at the end of each insn Richard Henderson
2023-11-01  4:11 ` [PATCH v2 19/21] target/sparc: Implement UDIVX and SDIVX inline Richard Henderson
2023-11-01  4:11 ` [PATCH v2 20/21] target/sparc: Implement UDIV inline Richard Henderson
2023-11-01  4:11 ` [PATCH v2 21/21] target/sparc: Check for invalid cond in gen_compare_reg Richard Henderson
2023-11-05 13:22 ` [PATCH v2 00/21] target/sparc: Cleanup condition codes etc Mark Cave-Ayland

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