From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@gmx.de
Subject: [PATCH v3 03/88] target/hppa: Use IntervalTreeNode in HPPATLBEntry
Date: Wed, 1 Nov 2023 18:28:51 -0700 [thread overview]
Message-ID: <20231102013016.369010-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231102013016.369010-1-richard.henderson@linaro.org>
Replace the va_b and va_b fields with the interval tree node.
The actual interval tree is not yet used.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/cpu.h | 5 +++--
target/hppa/machine.c | 6 +++---
target/hppa/mem_helper.c | 31 +++++++++++++++++--------------
3 files changed, 23 insertions(+), 19 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 22edfc955d..84bb6edc60 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -23,6 +23,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qemu/cpu-float.h"
+#include "qemu/interval-tree.h"
/* PA-RISC 1.x processors have a strong memory model. */
/* ??? While we do not yet implement PA-RISC 2.0, those processors have
@@ -175,8 +176,8 @@ typedef int64_t target_sreg;
#endif
typedef struct HPPATLBEntry {
- uint64_t va_b;
- uint64_t va_e;
+ IntervalTreeNode itree;
+
target_ureg pa;
unsigned u : 1;
unsigned t : 1;
diff --git a/target/hppa/machine.c b/target/hppa/machine.c
index 1d3f9b639d..4535195ca2 100644
--- a/target/hppa/machine.c
+++ b/target/hppa/machine.c
@@ -74,7 +74,7 @@ static int get_tlb(QEMUFile *f, void *opaque, size_t size,
memset(ent, 0, sizeof(*ent));
- ent->va_b = qemu_get_be64(f);
+ ent->itree.start = qemu_get_be64(f);
ent->pa = qemu_get_betr(f);
val = qemu_get_be32(f);
@@ -88,7 +88,7 @@ static int get_tlb(QEMUFile *f, void *opaque, size_t size,
ent->d = extract32(val, 28, 1);
ent->t = extract32(val, 29, 1);
- ent->va_e = ent->va_b + TARGET_PAGE_SIZE - 1;
+ ent->itree.last = ent->itree.start + TARGET_PAGE_SIZE - 1;
return 0;
}
@@ -110,7 +110,7 @@ static int put_tlb(QEMUFile *f, void *opaque, size_t size,
val = deposit32(val, 29, 1, ent->t);
}
- qemu_put_be64(f, ent->va_b);
+ qemu_put_be64(f, ent->itree.start);
qemu_put_betr(f, ent->pa);
qemu_put_be32(f, val);
return 0;
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index a22de81a48..687ae44ed0 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -31,9 +31,10 @@ static HPPATLBEntry *hppa_find_tlb(CPUHPPAState *env, vaddr addr)
for (i = 0; i < ARRAY_SIZE(env->tlb); ++i) {
HPPATLBEntry *ent = &env->tlb[i];
- if (ent->va_b <= addr && addr <= ent->va_e) {
+ if (ent->itree.start <= addr && addr <= ent->itree.last) {
trace_hppa_tlb_find_entry(env, ent + i, ent->entry_valid,
- ent->va_b, ent->va_e, ent->pa);
+ ent->itree.start, ent->itree.last,
+ ent->pa);
return ent;
}
}
@@ -50,11 +51,12 @@ static void hppa_flush_tlb_ent(CPUHPPAState *env, HPPATLBEntry *ent,
return;
}
- trace_hppa_tlb_flush_ent(env, ent, ent->va_b, ent->va_e, ent->pa);
+ trace_hppa_tlb_flush_ent(env, ent, ent->itree.start,
+ ent->itree.last, ent->pa);
- tlb_flush_range_by_mmuidx(cs, ent->va_b,
- ent->va_e - ent->va_b + 1,
- HPPA_MMU_FLUSH_MASK, TARGET_LONG_BITS);
+ tlb_flush_range_by_mmuidx(cs, ent->itree.start,
+ ent->itree.last - ent->itree.start + 1,
+ HPPA_MMU_FLUSH_MASK, TARGET_LONG_BITS);
/* never clear BTLBs, unless forced to do so. */
if (ent < &env->tlb[HPPA_BTLB_ENTRIES] && !force_flush_btlb) {
@@ -62,7 +64,7 @@ static void hppa_flush_tlb_ent(CPUHPPAState *env, HPPATLBEntry *ent,
}
memset(ent, 0, sizeof(*ent));
- ent->va_b = -1;
+ ent->itree.start = -1;
}
static HPPATLBEntry *hppa_alloc_tlb_ent(CPUHPPAState *env)
@@ -118,7 +120,7 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
}
/* We now know the physical address. */
- phys = ent->pa + (addr - ent->va_b);
+ phys = ent->pa + (addr - ent->itree.start);
/* Map TLB access_rights field to QEMU protection. */
priv = MMU_IDX_TO_PRIV(mmu_idx);
@@ -281,7 +283,7 @@ void HELPER(itlba)(CPUHPPAState *env, target_ulong addr, target_ureg reg)
/* Zap any old entries covering ADDR; notice empty entries on the way. */
for (i = HPPA_BTLB_ENTRIES; i < ARRAY_SIZE(env->tlb); ++i) {
HPPATLBEntry *ent = &env->tlb[i];
- if (ent->va_b <= addr && addr <= ent->va_e) {
+ if (ent->itree.start <= addr && addr <= ent->itree.last) {
if (ent->entry_valid) {
hppa_flush_tlb_ent(env, ent, false);
}
@@ -297,10 +299,11 @@ void HELPER(itlba)(CPUHPPAState *env, target_ulong addr, target_ureg reg)
}
/* Note that empty->entry_valid == 0 already. */
- empty->va_b = addr & TARGET_PAGE_MASK;
- empty->va_e = empty->va_b + TARGET_PAGE_SIZE - 1;
+ empty->itree.start = addr & TARGET_PAGE_MASK;
+ empty->itree.last = empty->itree.start + TARGET_PAGE_SIZE - 1;
empty->pa = extract32(reg, 5, 20) << TARGET_PAGE_BITS;
- trace_hppa_tlb_itlba(env, empty, empty->va_b, empty->va_e, empty->pa);
+ trace_hppa_tlb_itlba(env, empty, empty->itree.start,
+ empty->itree.last, empty->pa);
}
static void set_access_bits(CPUHPPAState *env, HPPATLBEntry *ent, target_ureg reg)
@@ -467,8 +470,8 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
/* force flush of possibly existing BTLB entry */
hppa_flush_tlb_ent(env, btlb, true);
/* create new BTLB entry */
- btlb->va_b = virt_page << TARGET_PAGE_BITS;
- btlb->va_e = btlb->va_b + len * TARGET_PAGE_SIZE - 1;
+ btlb->itree.start = virt_page << TARGET_PAGE_BITS;
+ btlb->itree.last = btlb->itree.start + len * TARGET_PAGE_SIZE - 1;
btlb->pa = phys_page << TARGET_PAGE_BITS;
set_access_bits(env, btlb, env->gr[20]);
btlb->t = 0;
--
2.34.1
next prev parent reply other threads:[~2023-11-02 1:33 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-02 1:28 [PATCH v3 00/88] target/hppa: Implement hppa64 cpu Richard Henderson
2023-11-02 1:28 ` [PATCH v3 01/88] target/hppa: Include PSW_P in tb flags and mmu index Richard Henderson
2023-11-02 1:28 ` [PATCH v3 02/88] target/hppa: Rename hppa_tlb_entry to HPPATLBEntry Richard Henderson
2023-11-02 1:28 ` Richard Henderson [this message]
2023-11-02 1:28 ` [PATCH v3 04/88] target/hppa: Always report one page to tlb_set_page Richard Henderson
2023-11-02 1:28 ` [PATCH v3 05/88] target/hppa: Split out hppa_flush_tlb_range Richard Henderson
2023-11-02 1:28 ` [PATCH v3 06/88] target/hppa: Populate an interval tree with valid tlb entries Richard Henderson
2023-11-02 1:28 ` [PATCH v3 07/88] tcg: Improve expansion of deposit of constant Richard Henderson
2023-11-02 1:28 ` [PATCH v3 08/88] tcg: Improve expansion of deposit into a constant Richard Henderson
2023-11-02 1:28 ` [PATCH v3 09/88] target/hppa: Remove get_temp Richard Henderson
2023-11-02 1:28 ` [PATCH v3 10/88] target/hppa: Remove get_temp_tl Richard Henderson
2023-11-02 1:28 ` [PATCH v3 11/88] target/hppa: Remove load_const Richard Henderson
2023-11-02 1:29 ` [PATCH v3 12/88] target/hppa: Fix hppa64 case in machine.c Richard Henderson
2023-11-02 1:29 ` [PATCH v3 13/88] target/hppa: Fix load in do_load_32 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 14/88] target/hppa: Truncate rotate count in trans_shrpw_sar Richard Henderson
2023-11-02 1:29 ` [PATCH v3 15/88] target/hppa: Fix trans_ds for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 16/88] target/hppa: Fix do_add, do_sub " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 17/88] target/hppa: Fix bb_sar " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 18/88] target/hppa: Fix extrw and depw with sar " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 19/88] target/hppa: Introduce TYPE_HPPA64_CPU Richard Henderson
2023-11-02 1:29 ` [PATCH v3 20/88] target/hppa: Make HPPA_BTLB_ENTRIES variable Richard Henderson
2023-11-02 1:29 ` [PATCH v3 21/88] target/hppa: Implement cpu_list Richard Henderson
2023-11-02 1:29 ` [PATCH v3 22/88] target/hppa: Implement hppa_cpu_class_by_name Richard Henderson
2023-11-02 1:29 ` [PATCH v3 23/88] target/hppa: Update cpu_hppa_get/put_psw for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 24/88] target/hppa: Handle absolute addresses for pa2.0 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 25/88] target/hppa: Adjust hppa_cpu_dump_state for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 26/88] target/hppa: Fix hppa64 addressing Richard Henderson
2023-11-02 1:29 ` [PATCH v3 27/88] target/hppa: Pass DisasContext to copy_iaoq_entry Richard Henderson
2023-11-02 1:29 ` [PATCH v3 28/88] target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb] Richard Henderson
2023-11-02 1:29 ` [PATCH v3 29/88] target/hppa: Use copy_iaoq_entry for link in do_ibranch Richard Henderson
2023-11-02 1:29 ` [PATCH v3 30/88] target/hppa: Mask inputs in copy_iaoq_entry Richard Henderson
2023-11-02 1:29 ` [PATCH v3 31/88] target/hppa: sar register allows only 5 bits on 32-bit CPU Richard Henderson
2023-11-02 1:29 ` [PATCH v3 32/88] target/hppa: Pass d to do_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 33/88] target/hppa: Pass d to do_sub_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 34/88] target/hppa: Pass d to do_log_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 35/88] target/hppa: Pass d to do_sed_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 36/88] target/hppa: Pass d to do_unit_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 37/88] linux-user/hppa: Fixes for TARGET_ABI32 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 38/88] target/hppa: Drop attempted gdbstub support for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 39/88] target/hppa: Remove TARGET_HPPA64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 40/88] target/hppa: Decode d for logical instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 41/88] target/hppa: Decode d for unit instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 42/88] target/hppa: Decode d for cmpclr instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 43/88] target/hppa: Decode d for add instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 44/88] target/hppa: Decode d for sub instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 45/88] target/hppa: Decode d for bb instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 46/88] target/hppa: Decode d for cmpb instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 47/88] target/hppa: Decode CMPIB double-word Richard Henderson
2023-11-02 1:29 ` [PATCH v3 48/88] target/hppa: Decode ADDB double-word Richard Henderson
2023-11-02 1:29 ` [PATCH v3 49/88] target/hppa: Implement LDD, LDCD, LDDA, STD, STDA Richard Henderson
2023-11-02 1:29 ` [PATCH v3 50/88] target/hppa: Implement DEPD, DEPDI Richard Henderson
2023-11-02 1:29 ` [PATCH v3 51/88] target/hppa: Implement EXTRD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 52/88] target/hppa: Implement SHRPD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 53/88] target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM Richard Henderson
2023-11-02 1:29 ` [PATCH v3 54/88] target/hppa: Implement STDBY Richard Henderson
2023-11-02 1:29 ` [PATCH v3 55/88] target/hppa: Implement IDTLBT, IITLBT Richard Henderson
2023-11-02 1:29 ` [PATCH v3 56/88] hw/hppa: Use uint32_t instead of target_ureg Richard Henderson
2023-11-02 1:29 ` [PATCH v3 57/88] target/hppa: Remove TARGET_REGISTER_BITS Richard Henderson
2023-11-02 1:29 ` [PATCH v3 58/88] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections Richard Henderson
2023-11-02 1:29 ` [PATCH v3 59/88] target/hppa: Remove remaining " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 60/88] target/hppa: Adjust vmstate_env for pa2.0 tlb Richard Henderson
2023-11-02 1:29 ` [PATCH v3 61/88] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new Richard Henderson
2023-11-02 1:29 ` [PATCH v3 62/88] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 63/88] target/hppa: Implement HADD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 64/88] target/hppa: Implement HSUB Richard Henderson
2023-11-02 1:29 ` [PATCH v3 65/88] target/hppa: Implement HAVG Richard Henderson
2023-11-02 1:29 ` [PATCH v3 66/88] target/hppa: Implement HSHL, HSHR Richard Henderson
2023-11-02 1:29 ` [PATCH v3 67/88] target/hppa: Implement HSHLADD, HSHRADD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 68/88] target/hppa: Implement MIXH, MIXW Richard Henderson
2023-11-02 1:29 ` [PATCH v3 69/88] target/hppa: Implement PERMH Richard Henderson
2023-11-02 1:29 ` [PATCH v3 70/88] target/hppa: Fix interruption based on default PSW Richard Henderson
2023-11-02 1:29 ` [PATCH v3 71/88] target/hppa: Precompute zero into DisasContext Richard Henderson
2023-11-02 1:30 ` [PATCH v3 72/88] target/hppa: Return zero for r0 from load_gpr Richard Henderson
2023-11-02 1:30 ` [PATCH v3 73/88] include/hw/elf: Remove truncating signed casts Richard Henderson
2023-11-02 1:30 ` [PATCH v3 74/88] hw/hppa: Translate phys addresses for the cpu Richard Henderson
2023-11-02 1:30 ` [PATCH v3 75/88] linux-user/hppa: Drop EXCP_DUMP from handled exceptions Richard Henderson
2023-11-02 1:30 ` [PATCH v3 76/88] target/hppa: Implement pa2.0 data prefetch instructions Richard Henderson
2023-11-02 1:30 ` [PATCH v3 77/88] target/hppa: Add pa2.0 cpu local tlb flushes Richard Henderson
2023-11-02 1:30 ` [PATCH v3 78/88] target/hppa: Avoid async_safe_run_on_cpu on uniprocessor system Richard Henderson
2023-11-02 1:30 ` [PATCH v3 79/88] target/hppa: Clear upper bits in mtctl for pa1.x Richard Henderson
2023-11-02 1:30 ` [PATCH v3 80/88] target/hppa: Add unwind_breg to CPUHPPAState Richard Henderson
2023-11-02 1:30 ` [PATCH v3 81/88] target/hppa: Create raise_exception_with_ior Richard Henderson
2023-11-02 1:30 ` [PATCH v3 82/88] target/hppa: Update IIAOQ, IIASQ for pa2.0 Richard Henderson
2023-11-02 1:30 ` [PATCH v3 83/88] target/hppa: Improve interrupt logging Richard Henderson
2023-11-02 1:30 ` [PATCH v3 84/88] hw/pci-host/astro: Map Astro chip into 64-bit I/O memory region Richard Henderson
2023-11-02 1:30 ` [PATCH v3 85/88] hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory Richard Henderson
2023-11-02 1:30 ` [PATCH v3 86/88] hw/hppa: Turn on 64-bit CPU for C3700 machine Richard Henderson
2023-11-02 1:30 ` [PATCH v3 87/88] hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU only Richard Henderson
2023-11-02 1:30 ` [PATCH v3 88/88] hw/hppa: Map PDC ROM and I/O memory area into lower memory Richard Henderson
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