From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@gmx.de
Subject: [PATCH v3 43/88] target/hppa: Decode d for add instructions
Date: Wed, 1 Nov 2023 18:29:31 -0700 [thread overview]
Message-ID: <20231102013016.369010-44-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231102013016.369010-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/insns.decode | 16 ++++++++--------
target/hppa/translate.c | 21 +++++++++++----------
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index d4a03b0299..0f29869949 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -62,7 +62,7 @@
&rr_cf_d t r cf d
&rrr_cf t r1 r2 cf
&rrr_cf_d t r1 r2 cf d
-&rrr_cf_sh t r1 r2 cf sh
+&rrr_cf_d_sh t r1 r2 cf d sh
&rri_cf t r i cf
&rri_cf_d t r i cf d
@@ -76,8 +76,8 @@
@rr_cf_d ...... r:5 ..... cf:4 ...... d:1 t:5 &rr_cf_d
@rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf
@rrr_cf_d ...... r2:5 r1:5 cf:4 ...... d:1 t:5 &rrr_cf_d
-@rrr_cf_sh ...... r2:5 r1:5 cf:4 .... sh:2 . t:5 &rrr_cf_sh
-@rrr_cf_sh0 ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf_sh sh=0
+@rrr_cf_d_sh ...... r2:5 r1:5 cf:4 .... sh:2 d:1 t:5 &rrr_cf_d_sh
+@rrr_cf_d_sh0 ...... r2:5 r1:5 cf:4 ...... d:1 t:5 &rrr_cf_d_sh sh=0
@rri_cf ...... r:5 t:5 cf:4 . ........... &rri_cf i=%lowsign_11
@rri_cf_d ...... r:5 t:5 cf:4 d:1 ........... &rri_cf_d i=%lowsign_11
@@ -166,11 +166,11 @@ uaddcm_tc 000010 ..... ..... .... 100111 . ..... @rrr_cf_d
dcor 000010 ..... 00000 .... 101110 . ..... @rr_cf_d
dcor_i 000010 ..... 00000 .... 101111 . ..... @rr_cf_d
-add 000010 ..... ..... .... 0110.. - ..... @rrr_cf_sh
-add_l 000010 ..... ..... .... 1010.. 0 ..... @rrr_cf_sh
-add_tsv 000010 ..... ..... .... 1110.. 0 ..... @rrr_cf_sh
-add_c 000010 ..... ..... .... 011100 0 ..... @rrr_cf_sh0
-add_c_tsv 000010 ..... ..... .... 111100 0 ..... @rrr_cf_sh0
+add 000010 ..... ..... .... 0110.. . ..... @rrr_cf_d_sh
+add_l 000010 ..... ..... .... 1010.. . ..... @rrr_cf_d_sh
+add_tsv 000010 ..... ..... .... 1110.. . ..... @rrr_cf_d_sh
+add_c 000010 ..... ..... .... 011100 . ..... @rrr_cf_d_sh0
+add_c_tsv 000010 ..... ..... .... 111100 . ..... @rrr_cf_d_sh0
sub 000010 ..... ..... .... 010000 - ..... @rrr_cf
sub_tsv 000010 ..... ..... .... 110000 0 ..... @rrr_cf
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 8301d007ff..2f5cc597ad 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1186,12 +1186,11 @@ static TCGv_reg do_sub_sv(DisasContext *ctx, TCGv_reg res,
static void do_add(DisasContext *ctx, unsigned rt, TCGv_reg in1,
TCGv_reg in2, unsigned shift, bool is_l,
- bool is_tsv, bool is_tc, bool is_c, unsigned cf)
+ bool is_tsv, bool is_tc, bool is_c, unsigned cf, bool d)
{
TCGv_reg dest, cb, cb_msb, cb_cond, sv, tmp;
unsigned c = cf >> 1;
DisasCond cond;
- bool d = false;
dest = tcg_temp_new();
cb = NULL;
@@ -1256,7 +1255,7 @@ static void do_add(DisasContext *ctx, unsigned rt, TCGv_reg in1,
ctx->null_cond = cond;
}
-static bool do_add_reg(DisasContext *ctx, arg_rrr_cf_sh *a,
+static bool do_add_reg(DisasContext *ctx, arg_rrr_cf_d_sh *a,
bool is_l, bool is_tsv, bool is_tc, bool is_c)
{
TCGv_reg tcg_r1, tcg_r2;
@@ -1266,7 +1265,8 @@ static bool do_add_reg(DisasContext *ctx, arg_rrr_cf_sh *a,
}
tcg_r1 = load_gpr(ctx, a->r1);
tcg_r2 = load_gpr(ctx, a->r2);
- do_add(ctx, a->t, tcg_r1, tcg_r2, a->sh, is_l, is_tsv, is_tc, is_c, a->cf);
+ do_add(ctx, a->t, tcg_r1, tcg_r2, a->sh, is_l,
+ is_tsv, is_tc, is_c, a->cf, a->d);
return nullify_end(ctx);
}
@@ -1280,7 +1280,8 @@ static bool do_add_imm(DisasContext *ctx, arg_rri_cf *a,
}
tcg_im = tcg_constant_reg(a->i);
tcg_r2 = load_gpr(ctx, a->r);
- do_add(ctx, a->t, tcg_im, tcg_r2, 0, 0, is_tsv, is_tc, 0, a->cf);
+ /* All ADDI conditions are 32-bit. */
+ do_add(ctx, a->t, tcg_im, tcg_r2, 0, 0, is_tsv, is_tc, 0, a->cf, false);
return nullify_end(ctx);
}
@@ -2635,27 +2636,27 @@ static bool trans_lci(DisasContext *ctx, arg_lci *a)
return true;
}
-static bool trans_add(DisasContext *ctx, arg_rrr_cf_sh *a)
+static bool trans_add(DisasContext *ctx, arg_rrr_cf_d_sh *a)
{
return do_add_reg(ctx, a, false, false, false, false);
}
-static bool trans_add_l(DisasContext *ctx, arg_rrr_cf_sh *a)
+static bool trans_add_l(DisasContext *ctx, arg_rrr_cf_d_sh *a)
{
return do_add_reg(ctx, a, true, false, false, false);
}
-static bool trans_add_tsv(DisasContext *ctx, arg_rrr_cf_sh *a)
+static bool trans_add_tsv(DisasContext *ctx, arg_rrr_cf_d_sh *a)
{
return do_add_reg(ctx, a, false, true, false, false);
}
-static bool trans_add_c(DisasContext *ctx, arg_rrr_cf_sh *a)
+static bool trans_add_c(DisasContext *ctx, arg_rrr_cf_d_sh *a)
{
return do_add_reg(ctx, a, false, false, false, true);
}
-static bool trans_add_c_tsv(DisasContext *ctx, arg_rrr_cf_sh *a)
+static bool trans_add_c_tsv(DisasContext *ctx, arg_rrr_cf_d_sh *a)
{
return do_add_reg(ctx, a, false, true, false, true);
}
--
2.34.1
next prev parent reply other threads:[~2023-11-02 1:37 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-02 1:28 [PATCH v3 00/88] target/hppa: Implement hppa64 cpu Richard Henderson
2023-11-02 1:28 ` [PATCH v3 01/88] target/hppa: Include PSW_P in tb flags and mmu index Richard Henderson
2023-11-02 1:28 ` [PATCH v3 02/88] target/hppa: Rename hppa_tlb_entry to HPPATLBEntry Richard Henderson
2023-11-02 1:28 ` [PATCH v3 03/88] target/hppa: Use IntervalTreeNode in HPPATLBEntry Richard Henderson
2023-11-02 1:28 ` [PATCH v3 04/88] target/hppa: Always report one page to tlb_set_page Richard Henderson
2023-11-02 1:28 ` [PATCH v3 05/88] target/hppa: Split out hppa_flush_tlb_range Richard Henderson
2023-11-02 1:28 ` [PATCH v3 06/88] target/hppa: Populate an interval tree with valid tlb entries Richard Henderson
2023-11-02 1:28 ` [PATCH v3 07/88] tcg: Improve expansion of deposit of constant Richard Henderson
2023-11-02 1:28 ` [PATCH v3 08/88] tcg: Improve expansion of deposit into a constant Richard Henderson
2023-11-02 1:28 ` [PATCH v3 09/88] target/hppa: Remove get_temp Richard Henderson
2023-11-02 1:28 ` [PATCH v3 10/88] target/hppa: Remove get_temp_tl Richard Henderson
2023-11-02 1:28 ` [PATCH v3 11/88] target/hppa: Remove load_const Richard Henderson
2023-11-02 1:29 ` [PATCH v3 12/88] target/hppa: Fix hppa64 case in machine.c Richard Henderson
2023-11-02 1:29 ` [PATCH v3 13/88] target/hppa: Fix load in do_load_32 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 14/88] target/hppa: Truncate rotate count in trans_shrpw_sar Richard Henderson
2023-11-02 1:29 ` [PATCH v3 15/88] target/hppa: Fix trans_ds for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 16/88] target/hppa: Fix do_add, do_sub " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 17/88] target/hppa: Fix bb_sar " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 18/88] target/hppa: Fix extrw and depw with sar " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 19/88] target/hppa: Introduce TYPE_HPPA64_CPU Richard Henderson
2023-11-02 1:29 ` [PATCH v3 20/88] target/hppa: Make HPPA_BTLB_ENTRIES variable Richard Henderson
2023-11-02 1:29 ` [PATCH v3 21/88] target/hppa: Implement cpu_list Richard Henderson
2023-11-02 1:29 ` [PATCH v3 22/88] target/hppa: Implement hppa_cpu_class_by_name Richard Henderson
2023-11-02 1:29 ` [PATCH v3 23/88] target/hppa: Update cpu_hppa_get/put_psw for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 24/88] target/hppa: Handle absolute addresses for pa2.0 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 25/88] target/hppa: Adjust hppa_cpu_dump_state for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 26/88] target/hppa: Fix hppa64 addressing Richard Henderson
2023-11-02 1:29 ` [PATCH v3 27/88] target/hppa: Pass DisasContext to copy_iaoq_entry Richard Henderson
2023-11-02 1:29 ` [PATCH v3 28/88] target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb] Richard Henderson
2023-11-02 1:29 ` [PATCH v3 29/88] target/hppa: Use copy_iaoq_entry for link in do_ibranch Richard Henderson
2023-11-02 1:29 ` [PATCH v3 30/88] target/hppa: Mask inputs in copy_iaoq_entry Richard Henderson
2023-11-02 1:29 ` [PATCH v3 31/88] target/hppa: sar register allows only 5 bits on 32-bit CPU Richard Henderson
2023-11-02 1:29 ` [PATCH v3 32/88] target/hppa: Pass d to do_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 33/88] target/hppa: Pass d to do_sub_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 34/88] target/hppa: Pass d to do_log_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 35/88] target/hppa: Pass d to do_sed_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 36/88] target/hppa: Pass d to do_unit_cond Richard Henderson
2023-11-02 1:29 ` [PATCH v3 37/88] linux-user/hppa: Fixes for TARGET_ABI32 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 38/88] target/hppa: Drop attempted gdbstub support for hppa64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 39/88] target/hppa: Remove TARGET_HPPA64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 40/88] target/hppa: Decode d for logical instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 41/88] target/hppa: Decode d for unit instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 42/88] target/hppa: Decode d for cmpclr instructions Richard Henderson
2023-11-02 1:29 ` Richard Henderson [this message]
2023-11-02 1:29 ` [PATCH v3 44/88] target/hppa: Decode d for sub instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 45/88] target/hppa: Decode d for bb instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 46/88] target/hppa: Decode d for cmpb instructions Richard Henderson
2023-11-02 1:29 ` [PATCH v3 47/88] target/hppa: Decode CMPIB double-word Richard Henderson
2023-11-02 1:29 ` [PATCH v3 48/88] target/hppa: Decode ADDB double-word Richard Henderson
2023-11-02 1:29 ` [PATCH v3 49/88] target/hppa: Implement LDD, LDCD, LDDA, STD, STDA Richard Henderson
2023-11-02 1:29 ` [PATCH v3 50/88] target/hppa: Implement DEPD, DEPDI Richard Henderson
2023-11-02 1:29 ` [PATCH v3 51/88] target/hppa: Implement EXTRD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 52/88] target/hppa: Implement SHRPD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 53/88] target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM Richard Henderson
2023-11-02 1:29 ` [PATCH v3 54/88] target/hppa: Implement STDBY Richard Henderson
2023-11-02 1:29 ` [PATCH v3 55/88] target/hppa: Implement IDTLBT, IITLBT Richard Henderson
2023-11-02 1:29 ` [PATCH v3 56/88] hw/hppa: Use uint32_t instead of target_ureg Richard Henderson
2023-11-02 1:29 ` [PATCH v3 57/88] target/hppa: Remove TARGET_REGISTER_BITS Richard Henderson
2023-11-02 1:29 ` [PATCH v3 58/88] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections Richard Henderson
2023-11-02 1:29 ` [PATCH v3 59/88] target/hppa: Remove remaining " Richard Henderson
2023-11-02 1:29 ` [PATCH v3 60/88] target/hppa: Adjust vmstate_env for pa2.0 tlb Richard Henderson
2023-11-02 1:29 ` [PATCH v3 61/88] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new Richard Henderson
2023-11-02 1:29 ` [PATCH v3 62/88] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64 Richard Henderson
2023-11-02 1:29 ` [PATCH v3 63/88] target/hppa: Implement HADD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 64/88] target/hppa: Implement HSUB Richard Henderson
2023-11-02 1:29 ` [PATCH v3 65/88] target/hppa: Implement HAVG Richard Henderson
2023-11-02 1:29 ` [PATCH v3 66/88] target/hppa: Implement HSHL, HSHR Richard Henderson
2023-11-02 1:29 ` [PATCH v3 67/88] target/hppa: Implement HSHLADD, HSHRADD Richard Henderson
2023-11-02 1:29 ` [PATCH v3 68/88] target/hppa: Implement MIXH, MIXW Richard Henderson
2023-11-02 1:29 ` [PATCH v3 69/88] target/hppa: Implement PERMH Richard Henderson
2023-11-02 1:29 ` [PATCH v3 70/88] target/hppa: Fix interruption based on default PSW Richard Henderson
2023-11-02 1:29 ` [PATCH v3 71/88] target/hppa: Precompute zero into DisasContext Richard Henderson
2023-11-02 1:30 ` [PATCH v3 72/88] target/hppa: Return zero for r0 from load_gpr Richard Henderson
2023-11-02 1:30 ` [PATCH v3 73/88] include/hw/elf: Remove truncating signed casts Richard Henderson
2023-11-02 1:30 ` [PATCH v3 74/88] hw/hppa: Translate phys addresses for the cpu Richard Henderson
2023-11-02 1:30 ` [PATCH v3 75/88] linux-user/hppa: Drop EXCP_DUMP from handled exceptions Richard Henderson
2023-11-02 1:30 ` [PATCH v3 76/88] target/hppa: Implement pa2.0 data prefetch instructions Richard Henderson
2023-11-02 1:30 ` [PATCH v3 77/88] target/hppa: Add pa2.0 cpu local tlb flushes Richard Henderson
2023-11-02 1:30 ` [PATCH v3 78/88] target/hppa: Avoid async_safe_run_on_cpu on uniprocessor system Richard Henderson
2023-11-02 1:30 ` [PATCH v3 79/88] target/hppa: Clear upper bits in mtctl for pa1.x Richard Henderson
2023-11-02 1:30 ` [PATCH v3 80/88] target/hppa: Add unwind_breg to CPUHPPAState Richard Henderson
2023-11-02 1:30 ` [PATCH v3 81/88] target/hppa: Create raise_exception_with_ior Richard Henderson
2023-11-02 1:30 ` [PATCH v3 82/88] target/hppa: Update IIAOQ, IIASQ for pa2.0 Richard Henderson
2023-11-02 1:30 ` [PATCH v3 83/88] target/hppa: Improve interrupt logging Richard Henderson
2023-11-02 1:30 ` [PATCH v3 84/88] hw/pci-host/astro: Map Astro chip into 64-bit I/O memory region Richard Henderson
2023-11-02 1:30 ` [PATCH v3 85/88] hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory Richard Henderson
2023-11-02 1:30 ` [PATCH v3 86/88] hw/hppa: Turn on 64-bit CPU for C3700 machine Richard Henderson
2023-11-02 1:30 ` [PATCH v3 87/88] hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU only Richard Henderson
2023-11-02 1:30 ` [PATCH v3 88/88] hw/hppa: Map PDC ROM and I/O memory area into lower memory Richard Henderson
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