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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@gmx.de
Subject: [PATCH v3 82/88] target/hppa: Update IIAOQ, IIASQ for pa2.0
Date: Wed,  1 Nov 2023 18:30:10 -0700	[thread overview]
Message-ID: <20231102013016.369010-83-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231102013016.369010-1-richard.henderson@linaro.org>

These registers have a different format for pa2.0.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/int_helper.c | 46 ++++++++++++++++++++++++----------------
 target/hppa/sys_helper.c | 10 +++++++++
 2 files changed, 38 insertions(+), 18 deletions(-)

diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index a11d607b31..54875442e7 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -102,11 +102,7 @@ void hppa_cpu_do_interrupt(CPUState *cs)
     HPPACPU *cpu = HPPA_CPU(cs);
     CPUHPPAState *env = &cpu->env;
     int i = cs->exception_index;
-    target_ulong iaoq_f = env->iaoq_f;
-    target_ulong iaoq_b = env->iaoq_b;
-    uint64_t iasq_f = env->iasq_f;
-    uint64_t iasq_b = env->iasq_b;
-    target_ulong old_psw;
+    uint64_t old_psw;
 
     /* As documented in pa2.0 -- interruption handling.  */
     /* step 1 */
@@ -118,10 +114,25 @@ void hppa_cpu_do_interrupt(CPUState *cs)
                      (i == EXCP_HPMC ? PSW_M : 0));
 
     /* step 3 */
-    env->cr[CR_IIASQ] = iasq_f >> 32;
-    env->cr_back[0] = iasq_b >> 32;
-    env->cr[CR_IIAOQ] = iaoq_f;
-    env->cr_back[1] = iaoq_b;
+    /*
+     * For pa1.x, IIASQ is simply a copy of IASQ.
+     * For pa2.0, IIASQ is the top bits of the virtual address,
+     *            or zero if translation is disabled.
+     */
+    if (!hppa_is_pa20(env)) {
+        env->cr[CR_IIASQ] = env->iasq_f >> 32;
+        env->cr_back[0] = env->iasq_b >> 32;
+    } else if (old_psw & PSW_C) {
+        env->cr[CR_IIASQ] =
+            hppa_form_gva_psw(old_psw, env->iasq_f, env->iaoq_f) >> 32;
+        env->cr_back[0] =
+            hppa_form_gva_psw(old_psw, env->iasq_f, env->iaoq_f) >> 32;
+    } else {
+        env->cr[CR_IIASQ] = 0;
+        env->cr_back[0] = 0;
+    }
+    env->cr[CR_IIAOQ] = env->iaoq_f;
+    env->cr_back[1] = env->iaoq_b;
 
     if (old_psw & PSW_Q) {
         /* step 5 */
@@ -154,14 +165,13 @@ void hppa_cpu_do_interrupt(CPUState *cs)
                 /* ??? An alternate fool-proof method would be to store the
                    instruction data into the unwind info.  That's probably
                    a bit too much in the way of extra storage required.  */
-                vaddr vaddr;
-                hwaddr paddr;
+                vaddr vaddr = env->iaoq_f & -4;
+                hwaddr paddr = vaddr;
 
-                paddr = vaddr = iaoq_f & -4;
                 if (old_psw & PSW_C) {
                     int prot, t;
 
-                    vaddr = hppa_form_gva_psw(old_psw, iasq_f, vaddr);
+                    vaddr = hppa_form_gva_psw(old_psw, env->iasq_f, vaddr);
                     t = hppa_get_physical_address(env, vaddr, MMU_KERNEL_IDX,
                                                   0, &paddr, &prot, NULL);
                     if (t >= 0) {
@@ -191,14 +201,14 @@ void hppa_cpu_do_interrupt(CPUState *cs)
 
     /* step 7 */
     if (i == EXCP_TOC) {
-        env->iaoq_f = FIRMWARE_START;
+        env->iaoq_f = hppa_form_gva(env, 0, FIRMWARE_START);
         /* help SeaBIOS and provide iaoq_b and iasq_back in shadow regs */
         env->gr[24] = env->cr_back[0];
         env->gr[25] = env->cr_back[1];
     } else {
-        env->iaoq_f = env->cr[CR_IVA] + 32 * i;
+        env->iaoq_f = hppa_form_gva(env, 0, env->cr[CR_IVA] + 32 * i);
     }
-    env->iaoq_b = env->iaoq_f + 4;
+    env->iaoq_b = hppa_form_gva(env, 0, env->iaoq_f + 4);
     env->iasq_f = 0;
     env->iasq_b = 0;
 
@@ -251,8 +261,8 @@ void hppa_cpu_do_interrupt(CPUState *cs)
         qemu_log("INT %6d: %s @ " TARGET_FMT_lx "," TARGET_FMT_lx
                  " -> " TARGET_FMT_lx " " TARGET_FMT_lx "\n",
                  ++count, name,
-                 hppa_form_gva(env, iasq_f, iaoq_f),
-                 hppa_form_gva(env, iasq_b, iaoq_b),
+                 hppa_form_gva(env, env->iasq_f, env->iaoq_f),
+                 hppa_form_gva(env, env->iasq_b, env->iaoq_b),
                  env->iaoq_f,
                  hppa_form_gva(env, (uint64_t)env->cr[CR_ISR] << 32,
                                env->cr[CR_IOR]));
diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c
index 8850576ac3..a59245eed3 100644
--- a/target/hppa/sys_helper.c
+++ b/target/hppa/sys_helper.c
@@ -80,6 +80,16 @@ void HELPER(rfi)(CPUHPPAState *env)
     env->iasq_b = (uint64_t)env->cr_back[0] << 32;
     env->iaoq_f = env->cr[CR_IIAOQ];
     env->iaoq_b = env->cr_back[1];
+
+    /*
+     * For pa2.0, IIASQ is the top bits of the virtual address.
+     * To recreate the space identifier, remove the offset bits.
+     */
+    if (hppa_is_pa20(env)) {
+        env->iasq_f &= ~env->iaoq_f;
+        env->iasq_b &= ~env->iaoq_b;
+    }
+
     cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
 }
 
-- 
2.34.1



  parent reply	other threads:[~2023-11-02  1:44 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-02  1:28 [PATCH v3 00/88] target/hppa: Implement hppa64 cpu Richard Henderson
2023-11-02  1:28 ` [PATCH v3 01/88] target/hppa: Include PSW_P in tb flags and mmu index Richard Henderson
2023-11-02  1:28 ` [PATCH v3 02/88] target/hppa: Rename hppa_tlb_entry to HPPATLBEntry Richard Henderson
2023-11-02  1:28 ` [PATCH v3 03/88] target/hppa: Use IntervalTreeNode in HPPATLBEntry Richard Henderson
2023-11-02  1:28 ` [PATCH v3 04/88] target/hppa: Always report one page to tlb_set_page Richard Henderson
2023-11-02  1:28 ` [PATCH v3 05/88] target/hppa: Split out hppa_flush_tlb_range Richard Henderson
2023-11-02  1:28 ` [PATCH v3 06/88] target/hppa: Populate an interval tree with valid tlb entries Richard Henderson
2023-11-02  1:28 ` [PATCH v3 07/88] tcg: Improve expansion of deposit of constant Richard Henderson
2023-11-02  1:28 ` [PATCH v3 08/88] tcg: Improve expansion of deposit into a constant Richard Henderson
2023-11-02  1:28 ` [PATCH v3 09/88] target/hppa: Remove get_temp Richard Henderson
2023-11-02  1:28 ` [PATCH v3 10/88] target/hppa: Remove get_temp_tl Richard Henderson
2023-11-02  1:28 ` [PATCH v3 11/88] target/hppa: Remove load_const Richard Henderson
2023-11-02  1:29 ` [PATCH v3 12/88] target/hppa: Fix hppa64 case in machine.c Richard Henderson
2023-11-02  1:29 ` [PATCH v3 13/88] target/hppa: Fix load in do_load_32 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 14/88] target/hppa: Truncate rotate count in trans_shrpw_sar Richard Henderson
2023-11-02  1:29 ` [PATCH v3 15/88] target/hppa: Fix trans_ds for hppa64 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 16/88] target/hppa: Fix do_add, do_sub " Richard Henderson
2023-11-02  1:29 ` [PATCH v3 17/88] target/hppa: Fix bb_sar " Richard Henderson
2023-11-02  1:29 ` [PATCH v3 18/88] target/hppa: Fix extrw and depw with sar " Richard Henderson
2023-11-02  1:29 ` [PATCH v3 19/88] target/hppa: Introduce TYPE_HPPA64_CPU Richard Henderson
2023-11-02  1:29 ` [PATCH v3 20/88] target/hppa: Make HPPA_BTLB_ENTRIES variable Richard Henderson
2023-11-02  1:29 ` [PATCH v3 21/88] target/hppa: Implement cpu_list Richard Henderson
2023-11-02  1:29 ` [PATCH v3 22/88] target/hppa: Implement hppa_cpu_class_by_name Richard Henderson
2023-11-02  1:29 ` [PATCH v3 23/88] target/hppa: Update cpu_hppa_get/put_psw for hppa64 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 24/88] target/hppa: Handle absolute addresses for pa2.0 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 25/88] target/hppa: Adjust hppa_cpu_dump_state for hppa64 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 26/88] target/hppa: Fix hppa64 addressing Richard Henderson
2023-11-02  1:29 ` [PATCH v3 27/88] target/hppa: Pass DisasContext to copy_iaoq_entry Richard Henderson
2023-11-02  1:29 ` [PATCH v3 28/88] target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb] Richard Henderson
2023-11-02  1:29 ` [PATCH v3 29/88] target/hppa: Use copy_iaoq_entry for link in do_ibranch Richard Henderson
2023-11-02  1:29 ` [PATCH v3 30/88] target/hppa: Mask inputs in copy_iaoq_entry Richard Henderson
2023-11-02  1:29 ` [PATCH v3 31/88] target/hppa: sar register allows only 5 bits on 32-bit CPU Richard Henderson
2023-11-02  1:29 ` [PATCH v3 32/88] target/hppa: Pass d to do_cond Richard Henderson
2023-11-02  1:29 ` [PATCH v3 33/88] target/hppa: Pass d to do_sub_cond Richard Henderson
2023-11-02  1:29 ` [PATCH v3 34/88] target/hppa: Pass d to do_log_cond Richard Henderson
2023-11-02  1:29 ` [PATCH v3 35/88] target/hppa: Pass d to do_sed_cond Richard Henderson
2023-11-02  1:29 ` [PATCH v3 36/88] target/hppa: Pass d to do_unit_cond Richard Henderson
2023-11-02  1:29 ` [PATCH v3 37/88] linux-user/hppa: Fixes for TARGET_ABI32 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 38/88] target/hppa: Drop attempted gdbstub support for hppa64 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 39/88] target/hppa: Remove TARGET_HPPA64 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 40/88] target/hppa: Decode d for logical instructions Richard Henderson
2023-11-02  1:29 ` [PATCH v3 41/88] target/hppa: Decode d for unit instructions Richard Henderson
2023-11-02  1:29 ` [PATCH v3 42/88] target/hppa: Decode d for cmpclr instructions Richard Henderson
2023-11-02  1:29 ` [PATCH v3 43/88] target/hppa: Decode d for add instructions Richard Henderson
2023-11-02  1:29 ` [PATCH v3 44/88] target/hppa: Decode d for sub instructions Richard Henderson
2023-11-02  1:29 ` [PATCH v3 45/88] target/hppa: Decode d for bb instructions Richard Henderson
2023-11-02  1:29 ` [PATCH v3 46/88] target/hppa: Decode d for cmpb instructions Richard Henderson
2023-11-02  1:29 ` [PATCH v3 47/88] target/hppa: Decode CMPIB double-word Richard Henderson
2023-11-02  1:29 ` [PATCH v3 48/88] target/hppa: Decode ADDB double-word Richard Henderson
2023-11-02  1:29 ` [PATCH v3 49/88] target/hppa: Implement LDD, LDCD, LDDA, STD, STDA Richard Henderson
2023-11-02  1:29 ` [PATCH v3 50/88] target/hppa: Implement DEPD, DEPDI Richard Henderson
2023-11-02  1:29 ` [PATCH v3 51/88] target/hppa: Implement EXTRD Richard Henderson
2023-11-02  1:29 ` [PATCH v3 52/88] target/hppa: Implement SHRPD Richard Henderson
2023-11-02  1:29 ` [PATCH v3 53/88] target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM Richard Henderson
2023-11-02  1:29 ` [PATCH v3 54/88] target/hppa: Implement STDBY Richard Henderson
2023-11-02  1:29 ` [PATCH v3 55/88] target/hppa: Implement IDTLBT, IITLBT Richard Henderson
2023-11-02  1:29 ` [PATCH v3 56/88] hw/hppa: Use uint32_t instead of target_ureg Richard Henderson
2023-11-02  1:29 ` [PATCH v3 57/88] target/hppa: Remove TARGET_REGISTER_BITS Richard Henderson
2023-11-02  1:29 ` [PATCH v3 58/88] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections Richard Henderson
2023-11-02  1:29 ` [PATCH v3 59/88] target/hppa: Remove remaining " Richard Henderson
2023-11-02  1:29 ` [PATCH v3 60/88] target/hppa: Adjust vmstate_env for pa2.0 tlb Richard Henderson
2023-11-02  1:29 ` [PATCH v3 61/88] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new Richard Henderson
2023-11-02  1:29 ` [PATCH v3 62/88] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64 Richard Henderson
2023-11-02  1:29 ` [PATCH v3 63/88] target/hppa: Implement HADD Richard Henderson
2023-11-02  1:29 ` [PATCH v3 64/88] target/hppa: Implement HSUB Richard Henderson
2023-11-02  1:29 ` [PATCH v3 65/88] target/hppa: Implement HAVG Richard Henderson
2023-11-02  1:29 ` [PATCH v3 66/88] target/hppa: Implement HSHL, HSHR Richard Henderson
2023-11-02  1:29 ` [PATCH v3 67/88] target/hppa: Implement HSHLADD, HSHRADD Richard Henderson
2023-11-02  1:29 ` [PATCH v3 68/88] target/hppa: Implement MIXH, MIXW Richard Henderson
2023-11-02  1:29 ` [PATCH v3 69/88] target/hppa: Implement PERMH Richard Henderson
2023-11-02  1:29 ` [PATCH v3 70/88] target/hppa: Fix interruption based on default PSW Richard Henderson
2023-11-02  1:29 ` [PATCH v3 71/88] target/hppa: Precompute zero into DisasContext Richard Henderson
2023-11-02  1:30 ` [PATCH v3 72/88] target/hppa: Return zero for r0 from load_gpr Richard Henderson
2023-11-02  1:30 ` [PATCH v3 73/88] include/hw/elf: Remove truncating signed casts Richard Henderson
2023-11-02  1:30 ` [PATCH v3 74/88] hw/hppa: Translate phys addresses for the cpu Richard Henderson
2023-11-02  1:30 ` [PATCH v3 75/88] linux-user/hppa: Drop EXCP_DUMP from handled exceptions Richard Henderson
2023-11-02  1:30 ` [PATCH v3 76/88] target/hppa: Implement pa2.0 data prefetch instructions Richard Henderson
2023-11-02  1:30 ` [PATCH v3 77/88] target/hppa: Add pa2.0 cpu local tlb flushes Richard Henderson
2023-11-02  1:30 ` [PATCH v3 78/88] target/hppa: Avoid async_safe_run_on_cpu on uniprocessor system Richard Henderson
2023-11-02  1:30 ` [PATCH v3 79/88] target/hppa: Clear upper bits in mtctl for pa1.x Richard Henderson
2023-11-02  1:30 ` [PATCH v3 80/88] target/hppa: Add unwind_breg to CPUHPPAState Richard Henderson
2023-11-02  1:30 ` [PATCH v3 81/88] target/hppa: Create raise_exception_with_ior Richard Henderson
2023-11-02  1:30 ` Richard Henderson [this message]
2023-11-02  1:30 ` [PATCH v3 83/88] target/hppa: Improve interrupt logging Richard Henderson
2023-11-02  1:30 ` [PATCH v3 84/88] hw/pci-host/astro: Map Astro chip into 64-bit I/O memory region Richard Henderson
2023-11-02  1:30 ` [PATCH v3 85/88] hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory Richard Henderson
2023-11-02  1:30 ` [PATCH v3 86/88] hw/hppa: Turn on 64-bit CPU for C3700 machine Richard Henderson
2023-11-02  1:30 ` [PATCH v3 87/88] hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU only Richard Henderson
2023-11-02  1:30 ` [PATCH v3 88/88] hw/hppa: Map PDC ROM and I/O memory area into lower memory Richard Henderson

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