From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: quintela@redhat.com, peterx@redhat.com, farosas@suse.de,
leobras@redhat.com
Subject: [PATCH 02/71] target/arm: Constify VMState in machine.c
Date: Sun, 5 Nov 2023 22:57:18 -0800 [thread overview]
Message-ID: <20231106065827.543129-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231106065827.543129-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/machine.c | 54 ++++++++++++++++++++++----------------------
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 9e20b41189..542be14bec 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -49,7 +49,7 @@ static const VMStateDescription vmstate_vfp = {
.version_id = 3,
.minimum_version_id = 3,
.needed = vfp_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
/* For compatibility, store Qn out of Zn here. */
VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[0].d, ARMCPU, 0, 2),
VMSTATE_UINT64_SUB_ARRAY(env.vfp.zregs[1].d, ARMCPU, 0, 2),
@@ -115,7 +115,7 @@ static const VMStateDescription vmstate_iwmmxt = {
.version_id = 1,
.minimum_version_id = 1,
.needed = iwmmxt_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64_ARRAY(env.iwmmxt.regs, ARMCPU, 16),
VMSTATE_UINT32_ARRAY(env.iwmmxt.cregs, ARMCPU, 16),
VMSTATE_END_OF_LIST()
@@ -140,7 +140,7 @@ static const VMStateDescription vmstate_zreg_hi_reg = {
.name = "cpu/sve/zreg_hi",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64_SUB_ARRAY(d, ARMVectorReg, 2, ARM_MAX_VQ - 2),
VMSTATE_END_OF_LIST()
}
@@ -150,7 +150,7 @@ static const VMStateDescription vmstate_preg_reg = {
.name = "cpu/sve/preg",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64_ARRAY(p, ARMPredicateReg, 2 * ARM_MAX_VQ / 8),
VMSTATE_END_OF_LIST()
}
@@ -161,7 +161,7 @@ static const VMStateDescription vmstate_sve = {
.version_id = 1,
.minimum_version_id = 1,
.needed = sve_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT_ARRAY(env.vfp.zregs, ARMCPU, 32, 0,
vmstate_zreg_hi_reg, ARMVectorReg),
VMSTATE_STRUCT_ARRAY(env.vfp.pregs, ARMCPU, 17, 0,
@@ -174,7 +174,7 @@ static const VMStateDescription vmstate_vreg = {
.name = "vreg",
.version_id = 1,
.minimum_version_id = 1,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT64_ARRAY(d, ARMVectorReg, ARM_MAX_VQ * 2),
VMSTATE_END_OF_LIST()
}
@@ -196,7 +196,7 @@ static const VMStateDescription vmstate_za = {
.version_id = 1,
.minimum_version_id = 1,
.needed = za_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_STRUCT_ARRAY(env.zarray, ARMCPU, ARM_MAX_VQ * 16, 0,
vmstate_vreg, ARMVectorReg),
VMSTATE_END_OF_LIST()
@@ -217,7 +217,7 @@ static const VMStateDescription vmstate_serror = {
.version_id = 1,
.minimum_version_id = 1,
.needed = serror_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT8(env.serror.pending, ARMCPU),
VMSTATE_UINT8(env.serror.has_esr, ARMCPU),
VMSTATE_UINT64(env.serror.esr, ARMCPU),
@@ -235,7 +235,7 @@ static const VMStateDescription vmstate_irq_line_state = {
.version_id = 1,
.minimum_version_id = 1,
.needed = irq_line_state_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.irq_line_state, ARMCPU),
VMSTATE_END_OF_LIST()
}
@@ -254,7 +254,7 @@ static const VMStateDescription vmstate_m_faultmask_primask = {
.version_id = 1,
.minimum_version_id = 1,
.needed = m_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.v7m.faultmask[M_REG_NS], ARMCPU),
VMSTATE_UINT32(env.v7m.primask[M_REG_NS], ARMCPU),
VMSTATE_END_OF_LIST()
@@ -289,7 +289,7 @@ static const VMStateDescription vmstate_m_csselr = {
.version_id = 1,
.minimum_version_id = 1,
.needed = m_csselr_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(env.v7m.csselr, ARMCPU, M_REG_NUM_BANKS),
VMSTATE_VALIDATE("CSSELR is valid", csselr_vmstate_validate),
VMSTATE_END_OF_LIST()
@@ -301,7 +301,7 @@ static const VMStateDescription vmstate_m_scr = {
.version_id = 1,
.minimum_version_id = 1,
.needed = m_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.v7m.scr[M_REG_NS], ARMCPU),
VMSTATE_END_OF_LIST()
}
@@ -312,7 +312,7 @@ static const VMStateDescription vmstate_m_other_sp = {
.version_id = 1,
.minimum_version_id = 1,
.needed = m_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.v7m.other_sp, ARMCPU),
VMSTATE_END_OF_LIST()
}
@@ -331,7 +331,7 @@ static const VMStateDescription vmstate_m_v8m = {
.version_id = 1,
.minimum_version_id = 1,
.needed = m_v8m_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(env.v7m.msplim, ARMCPU, M_REG_NUM_BANKS),
VMSTATE_UINT32_ARRAY(env.v7m.psplim, ARMCPU, M_REG_NUM_BANKS),
VMSTATE_END_OF_LIST()
@@ -343,7 +343,7 @@ static const VMStateDescription vmstate_m_fp = {
.version_id = 1,
.minimum_version_id = 1,
.needed = vfp_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(env.v7m.fpcar, ARMCPU, M_REG_NUM_BANKS),
VMSTATE_UINT32_ARRAY(env.v7m.fpccr, ARMCPU, M_REG_NUM_BANKS),
VMSTATE_UINT32_ARRAY(env.v7m.fpdscr, ARMCPU, M_REG_NUM_BANKS),
@@ -365,7 +365,7 @@ static const VMStateDescription vmstate_m_mve = {
.version_id = 1,
.minimum_version_id = 1,
.needed = mve_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.v7m.vpr, ARMCPU),
VMSTATE_UINT32(env.v7m.ltpsize, ARMCPU),
VMSTATE_END_OF_LIST()
@@ -377,7 +377,7 @@ static const VMStateDescription vmstate_m = {
.version_id = 4,
.minimum_version_id = 4,
.needed = m_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.v7m.vecbase[M_REG_NS], ARMCPU),
VMSTATE_UINT32(env.v7m.basepri[M_REG_NS], ARMCPU),
VMSTATE_UINT32(env.v7m.control[M_REG_NS], ARMCPU),
@@ -391,7 +391,7 @@ static const VMStateDescription vmstate_m = {
VMSTATE_INT32(env.v7m.exception, ARMCPU),
VMSTATE_END_OF_LIST()
},
- .subsections = (const VMStateDescription*[]) {
+ .subsections = (const VMStateDescription * const []) {
&vmstate_m_faultmask_primask,
&vmstate_m_csselr,
&vmstate_m_scr,
@@ -416,7 +416,7 @@ static const VMStateDescription vmstate_thumb2ee = {
.version_id = 1,
.minimum_version_id = 1,
.needed = thumb2ee_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.teecr, ARMCPU),
VMSTATE_UINT32(env.teehbr, ARMCPU),
VMSTATE_END_OF_LIST()
@@ -445,7 +445,7 @@ static const VMStateDescription vmstate_pmsav7 = {
.version_id = 1,
.minimum_version_id = 1,
.needed = pmsav7_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_VARRAY_UINT32(env.pmsav7.drbar, ARMCPU, pmsav7_dregion, 0,
vmstate_info_uint32, uint32_t),
VMSTATE_VARRAY_UINT32(env.pmsav7.drsr, ARMCPU, pmsav7_dregion, 0,
@@ -474,7 +474,7 @@ static const VMStateDescription vmstate_pmsav7_rnr = {
.version_id = 1,
.minimum_version_id = 1,
.needed = pmsav7_rnr_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.pmsav7.rnr[M_REG_NS], ARMCPU),
VMSTATE_END_OF_LIST()
}
@@ -504,7 +504,7 @@ static const VMStateDescription vmstate_pmsav8r = {
.version_id = 1,
.minimum_version_id = 1,
.needed = pmsav8r_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_VARRAY_UINT32(env.pmsav8.hprbar, ARMCPU,
pmsav8r_hdregion, 0, vmstate_info_uint32, uint32_t),
VMSTATE_VARRAY_UINT32(env.pmsav8.hprlar, ARMCPU,
@@ -518,7 +518,7 @@ static const VMStateDescription vmstate_pmsav8 = {
.version_id = 1,
.minimum_version_id = 1,
.needed = pmsav8_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_VARRAY_UINT32(env.pmsav8.rbar[M_REG_NS], ARMCPU, pmsav7_dregion,
0, vmstate_info_uint32, uint32_t),
VMSTATE_VARRAY_UINT32(env.pmsav8.rlar[M_REG_NS], ARMCPU, pmsav7_dregion,
@@ -527,7 +527,7 @@ static const VMStateDescription vmstate_pmsav8 = {
VMSTATE_UINT32(env.pmsav8.mair1[M_REG_NS], ARMCPU),
VMSTATE_END_OF_LIST()
},
- .subsections = (const VMStateDescription * []) {
+ .subsections = (const VMStateDescription * const []) {
&vmstate_pmsav8r,
NULL
}
@@ -560,7 +560,7 @@ static const VMStateDescription vmstate_m_security = {
.version_id = 1,
.minimum_version_id = 1,
.needed = m_security_needed,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32(env.v7m.secure, ARMCPU),
VMSTATE_UINT32(env.v7m.other_ss_msp, ARMCPU),
VMSTATE_UINT32(env.v7m.other_ss_psp, ARMCPU),
@@ -888,7 +888,7 @@ const VMStateDescription vmstate_arm_cpu = {
.post_save = cpu_post_save,
.pre_load = cpu_pre_load,
.post_load = cpu_post_load,
- .fields = (VMStateField[]) {
+ .fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(env.regs, ARMCPU, 16),
VMSTATE_UINT64_ARRAY(env.xregs, ARMCPU, 32),
VMSTATE_UINT64(env.pc, ARMCPU),
@@ -937,7 +937,7 @@ const VMStateDescription vmstate_arm_cpu = {
},
VMSTATE_END_OF_LIST()
},
- .subsections = (const VMStateDescription*[]) {
+ .subsections = (const VMStateDescription * const []) {
&vmstate_vfp,
&vmstate_iwmmxt,
&vmstate_m,
--
2.34.1
next prev parent reply other threads:[~2023-11-06 7:10 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-06 6:57 [PATCH 00/71] *: Constify VMState Richard Henderson
2023-11-06 6:57 ` [PATCH 01/71] migration: Make VMStateDescription.subsections const Richard Henderson
2023-11-06 11:17 ` Juan Quintela
2023-11-06 11:48 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` Richard Henderson [this message]
2023-11-06 11:54 ` [PATCH 02/71] target/arm: Constify VMState in machine.c Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 03/71] targt/arm: Constify hvf/hvf.c Richard Henderson
2023-11-06 11:54 ` Philippe Mathieu-Daudé
2023-11-08 10:15 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 04/71] target/alpha: Constify VMState in machine.c Richard Henderson
2023-11-06 6:57 ` [PATCH 05/71] target/avr: " Richard Henderson
2023-11-06 11:53 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 06/71] target/cris: " Richard Henderson
2023-11-08 10:12 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 07/71] target/hppa: " Richard Henderson
2023-11-08 10:13 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 08/71] target/i386: " Richard Henderson
2023-11-06 6:57 ` [PATCH 09/71] target/loongarch: " Richard Henderson
2023-11-06 6:57 ` [PATCH 10/71] target/m68k: " Richard Henderson
2023-11-06 6:57 ` [PATCH 11/71] target/microblaze: " Richard Henderson
2023-11-06 6:57 ` [PATCH 12/71] target/mips: " Richard Henderson
2023-11-06 11:49 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 13/71] target/openrisc: " Richard Henderson
2023-11-06 6:57 ` [PATCH 14/71] target/ppc: " Richard Henderson
2023-11-06 6:57 ` [PATCH 15/71] target/riscv: " Richard Henderson
2023-11-06 9:28 ` Alistair Francis
2023-11-06 6:57 ` [PATCH 16/71] target/s390x: " Richard Henderson
2023-11-06 6:57 ` [PATCH 17/71] target/sparc: " Richard Henderson
2023-11-06 22:05 ` Mark Cave-Ayland
2023-11-06 6:57 ` [PATCH 18/71] hw/arm: Constify VMState Richard Henderson
2023-11-06 11:53 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 19/71] hw/core: " Richard Henderson
2023-11-06 11:49 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 20/71] hw/9pfs: " Richard Henderson
2023-11-06 7:53 ` Greg Kurz
2023-11-06 11:44 ` Christian Schoenebeck
2023-11-06 6:57 ` [PATCH 21/71] hw/acpi: " Richard Henderson
2023-11-06 6:57 ` [PATCH 22/71] hw/adc: " Richard Henderson
2023-11-08 10:13 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 23/71] hw/audio: " Richard Henderson
2023-11-06 6:57 ` [PATCH 24/71] hw/block: " Richard Henderson
2023-11-06 6:57 ` [PATCH 25/71] hw/char: " Richard Henderson
2023-11-06 6:57 ` [PATCH 26/71] hw/display: " Richard Henderson
2023-11-06 6:57 ` [PATCH 27/71] hw/dma: " Richard Henderson
2023-11-06 6:57 ` [PATCH 28/71] hw/gpio: " Richard Henderson
2023-11-06 6:57 ` [PATCH 29/71] hw/hyperv: " Richard Henderson
2023-11-06 6:57 ` [PATCH 30/71] hw/i2c: " Richard Henderson
2023-11-06 6:57 ` [PATCH 31/71] hw/i386: " Richard Henderson
2023-11-06 6:57 ` [PATCH 32/71] hw/ide: " Richard Henderson
2023-11-06 6:57 ` [PATCH 33/71] hw/input: " Richard Henderson
2023-11-06 6:57 ` [PATCH 34/71] hw/intc: " Richard Henderson
2023-11-06 6:57 ` [PATCH 35/71] hw/ipack: " Richard Henderson
2023-11-06 6:57 ` [PATCH 36/71] hw/ipmi: " Richard Henderson
2023-11-06 6:57 ` [PATCH 37/71] hw/isa: " Richard Henderson
2023-11-08 10:14 ` Philippe Mathieu-Daudé
2023-11-06 6:57 ` [PATCH 38/71] hw/loongarch: " Richard Henderson
2023-11-06 6:57 ` [PATCH 39/71] hw/m68k: " Richard Henderson
2023-11-06 6:57 ` [PATCH 40/71] hw/misc: " Richard Henderson
2023-11-06 6:57 ` [PATCH 41/71] hw/net: " Richard Henderson
2023-11-06 6:57 ` [PATCH 42/71] hw/nvram: " Richard Henderson
2023-11-06 6:57 ` [PATCH 43/71] hw/openrisc: " Richard Henderson
2023-11-06 6:58 ` [PATCH 44/71] hw/pci: " Richard Henderson
2023-11-06 6:58 ` [PATCH 45/71] hw/pci-bridge: " Richard Henderson
2023-11-06 6:58 ` [PATCH 46/71] hw/pci-host: " Richard Henderson
2023-11-06 11:52 ` Philippe Mathieu-Daudé
2023-11-06 6:58 ` [PATCH 47/71] hw/ppc: " Richard Henderson
2023-11-06 6:58 ` [PATCH 48/71] hw/riscv: " Richard Henderson
2023-11-06 9:26 ` Alistair Francis
2023-11-06 6:58 ` [PATCH 49/71] hw/rtc: " Richard Henderson
2023-11-08 10:14 ` Philippe Mathieu-Daudé
2023-11-06 6:58 ` [PATCH 50/71] hw/s390x: " Richard Henderson
2023-11-06 6:58 ` [PATCH 51/71] hw/scsi: " Richard Henderson
2023-11-06 6:58 ` [PATCH 52/71] hw/sd: " Richard Henderson
2023-11-06 11:50 ` Philippe Mathieu-Daudé
2023-11-06 6:58 ` [PATCH 53/71] hw/sensor: " Richard Henderson
2023-11-06 11:55 ` Philippe Mathieu-Daudé
2023-11-06 16:08 ` Richard Henderson
2023-11-06 6:58 ` [PATCH 54/71] hw/sparc: " Richard Henderson
2023-11-06 6:58 ` [PATCH 55/71] hw/ssi: " Richard Henderson
2023-11-06 6:58 ` [PATCH 56/71] hw/timer: " Richard Henderson
2023-11-06 6:58 ` [PATCH 57/71] hw/tpm: " Richard Henderson
2023-11-06 6:58 ` [PATCH 58/71] hw/usb: " Richard Henderson
2023-11-06 6:58 ` [PATCH 59/71] hw/vfio: " Richard Henderson
2023-11-06 6:58 ` [PATCH 60/71] hw/virtio: " Richard Henderson
2023-11-06 6:58 ` [PATCH 61/71] hw/watchdog: " Richard Henderson
2023-11-06 6:58 ` [PATCH 62/71] hw/misc/macio: " Richard Henderson
2023-11-06 6:58 ` [PATCH 63/71] audio: " Richard Henderson
2023-11-06 6:58 ` [PATCH 64/71] backends: " Richard Henderson
2023-11-06 6:58 ` [PATCH 65/71] cpu-target: " Richard Henderson
2023-11-08 10:16 ` Philippe Mathieu-Daudé
2023-11-06 6:58 ` [PATCH 66/71] migration: " Richard Henderson
2023-11-06 11:18 ` Juan Quintela
2023-11-06 6:58 ` [PATCH 67/71] system: " Richard Henderson
2023-11-06 11:51 ` Philippe Mathieu-Daudé
2023-11-06 6:58 ` [PATCH 68/71] replay: " Richard Henderson
2023-11-06 6:58 ` [PATCH 69/71] util/fifo8: " Richard Henderson
2023-11-08 10:16 ` Philippe Mathieu-Daudé
2023-11-06 6:58 ` [PATCH 70/71] tests/unit/test-vmstate: " Richard Henderson
2023-11-06 11:24 ` Juan Quintela
2023-11-06 6:58 ` [PATCH 71/71] docs: Constify VMstate in examples Richard Henderson
2023-11-06 11:24 ` Juan Quintela
2023-11-06 11:51 ` Philippe Mathieu-Daudé
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