From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: kvm@vger.kernel.org, qemu-s390x@nongnu.org,
qemu-block@nongnu.org, qemu-riscv@nongnu.org,
qemu-ppc@nongnu.org, qemu-arm@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"LIU Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Michael Rolnik" <mrolnik@gmail.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Laurent Vivier" <laurent@vivier.eu>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Yoshinori Sato" <ysato@users.sourceforge.jp>,
"David Hildenbrand" <david@redhat.com>,
"Ilya Leoshkevich" <iii@linux.ibm.com>,
"Thomas Huth" <thuth@redhat.com>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Artyom Tarasenko" <atar4qemu@gmail.com>,
"Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
"Max Filippov" <jcmvbkbc@gmail.com>
Subject: [PULL 13/60] target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'
Date: Mon, 6 Nov 2023 12:02:45 +0100 [thread overview]
Message-ID: <20231106110336.358-14-philmd@linaro.org> (raw)
In-Reply-To: <20231106110336.358-1-philmd@linaro.org>
Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
macro to resolve target CPU types. Move the declaration
(along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".
"target/foo/cpu-qom.h" is supposed to be target agnostic
(include-able by any target). Add such mention in the
header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-7-philmd@linaro.org>
---
target/alpha/cpu-qom.h | 5 ++++-
target/alpha/cpu.h | 2 --
target/avr/cpu-qom.h | 5 ++++-
target/avr/cpu.h | 2 --
target/cris/cpu-qom.h | 5 ++++-
target/cris/cpu.h | 2 --
target/i386/cpu-qom.h | 3 +++
target/i386/cpu.h | 2 --
target/m68k/cpu-qom.h | 5 ++++-
target/m68k/cpu.h | 2 --
target/mips/cpu-qom.h | 3 +++
target/mips/cpu.h | 2 --
target/rx/cpu-qom.h | 5 ++++-
target/rx/cpu.h | 2 --
target/s390x/cpu-qom.h | 5 ++++-
target/s390x/cpu.h | 2 --
target/sh4/cpu-qom.h | 5 ++++-
target/sh4/cpu.h | 2 --
target/sparc/cpu-qom.h | 5 ++++-
target/sparc/cpu.h | 2 --
target/tricore/cpu-qom.h | 5 +++++
target/tricore/cpu.h | 2 --
target/xtensa/cpu-qom.h | 5 ++++-
target/xtensa/cpu.h | 2 --
24 files changed, 47 insertions(+), 33 deletions(-)
diff --git a/target/alpha/cpu-qom.h b/target/alpha/cpu-qom.h
index c5fbd8f11a..c4a4523993 100644
--- a/target/alpha/cpu-qom.h
+++ b/target/alpha/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU Alpha CPU
+ * QEMU Alpha CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(AlphaCPU, AlphaCPUClass, ALPHA_CPU)
+#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
+#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
+
/**
* AlphaCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index c8d97ac27a..3bff56c565 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -426,8 +426,6 @@ enum {
void alpha_translate_init(void);
-#define ALPHA_CPU_TYPE_SUFFIX "-" TYPE_ALPHA_CPU
-#define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
void alpha_cpu_list(void);
diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h
index d89be01e0f..75590cdd97 100644
--- a/target/avr/cpu-qom.h
+++ b/target/avr/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU AVR CPU
+ * QEMU AVR CPU QOM header (target agnostic)
*
* Copyright (c) 2016-2020 Michael Rolnik
*
@@ -28,6 +28,9 @@
OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU)
+#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
+#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
+
/**
* AVRCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index f8b065ed79..0487399cb2 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -28,8 +28,6 @@
#error "AVR 8-bit does not support user mode"
#endif
-#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
-#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_AVR_CPU
#define TCG_GUEST_DEFAULT_MO 0
diff --git a/target/cris/cpu-qom.h b/target/cris/cpu-qom.h
index c2fee242f4..d7e5f33e62 100644
--- a/target/cris/cpu-qom.h
+++ b/target/cris/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU CRIS CPU
+ * QEMU CRIS CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(CRISCPU, CRISCPUClass, CRIS_CPU)
+#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
+#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
+
/**
* CRISCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 6aa445348f..b821bb7983 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -240,8 +240,6 @@ enum {
/* CRIS uses 8k pages. */
#define MMAP_SHIFT TARGET_PAGE_BITS
-#define CRIS_CPU_TYPE_SUFFIX "-" TYPE_CRIS_CPU
-#define CRIS_CPU_TYPE_NAME(name) (name CRIS_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_CRIS_CPU
/* MMU modes definitions */
diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h
index 58145717ef..dffc74c1ce 100644
--- a/target/i386/cpu-qom.h
+++ b/target/i386/cpu-qom.h
@@ -32,6 +32,9 @@
OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU)
+#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
+#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
+
typedef struct X86CPUModel X86CPUModel;
/**
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 096f85483e..6c6b066986 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2239,8 +2239,6 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
/* hw/pc.c */
uint64_t cpu_get_tsc(CPUX86State *env);
-#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU
-#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_X86_CPU
#ifdef TARGET_X86_64
diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h
index 13d94c9fe3..df0cc8b7a3 100644
--- a/target/m68k/cpu-qom.h
+++ b/target/m68k/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU Motorola 68k CPU
+ * QEMU Motorola 68k CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(M68kCPU, M68kCPUClass, M68K_CPU)
+#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
+#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
+
/*
* M68kCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 9ea18028ad..7f34686a6f 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -561,8 +561,6 @@ enum {
ACCESS_DATA = 0x20, /* Data load/store access */
};
-#define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU
-#define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_M68K_CPU
#define cpu_list m68k_cpu_list
diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
index c70b4a34be..5822dfb1d2 100644
--- a/target/mips/cpu-qom.h
+++ b/target/mips/cpu-qom.h
@@ -31,6 +31,9 @@
OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
+#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
+#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
+
/**
* MIPSCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 617c373797..12cc1bfafd 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1301,8 +1301,6 @@ enum {
*/
#define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
-#define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
-#define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_MIPS_CPU
bool cpu_type_supports_cps_smp(const char *cpu_type);
diff --git a/target/rx/cpu-qom.h b/target/rx/cpu-qom.h
index f4cd5664e5..6213d877f7 100644
--- a/target/rx/cpu-qom.h
+++ b/target/rx/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * RX CPU
+ * QEMU RX CPU QOM header (target agnostic)
*
* Copyright (c) 2019 Yoshinori Sato
*
@@ -28,6 +28,9 @@
OBJECT_DECLARE_CPU_TYPE(RXCPU, RXCPUClass, RX_CPU)
+#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
+#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
+
/*
* RXCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index 8379f4a150..c81613770c 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -112,8 +112,6 @@ struct ArchCPU {
CPURXState env;
};
-#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
-#define RX_CPU_TYPE_NAME(model) model RX_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_RX_CPU
const char *rx_crname(uint8_t cr);
diff --git a/target/s390x/cpu-qom.h b/target/s390x/cpu-qom.h
index 1088965fd5..fcd70daddf 100644
--- a/target/s390x/cpu-qom.h
+++ b/target/s390x/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU S/390 CPU
+ * QEMU S/390 CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@@ -27,6 +27,9 @@
OBJECT_DECLARE_CPU_TYPE(S390CPU, S390CPUClass, S390_CPU)
+#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
+#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
+
typedef struct S390CPUModel S390CPUModel;
typedef struct S390CPUDef S390CPUDef;
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 4f366f9e4e..38d7197f4c 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -890,8 +890,6 @@ void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga,
/* helper.c */
-#define S390_CPU_TYPE_SUFFIX "-" TYPE_S390_CPU
-#define S390_CPU_TYPE_NAME(name) (name S390_CPU_TYPE_SUFFIX)
#define CPU_RESOLVING_TYPE TYPE_S390_CPU
/* interrupt.c */
diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 08fbebc996..bd0ef49fa1 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU SuperH CPU
+ * QEMU SuperH CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@@ -31,6 +31,9 @@
OBJECT_DECLARE_CPU_TYPE(SuperHCPU, SuperHCPUClass, SUPERH_CPU)
+#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
+#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
+
/**
* SuperHCPUClass:
* @parent_realize: The parent class' realize handler.
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index dc0561b73b..dbe00e29c2 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -250,8 +250,6 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr);
void cpu_load_tlb(CPUSH4State * env);
-#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
-#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
#define cpu_list sh4_cpu_list
diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h
index b4a0db84ce..aca29415b4 100644
--- a/target/sparc/cpu-qom.h
+++ b/target/sparc/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU SPARC CPU
+ * QEMU SPARC CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
@@ -31,6 +31,9 @@
OBJECT_DECLARE_CPU_TYPE(SPARCCPU, SPARCCPUClass, SPARC_CPU)
+#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
+#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
+
typedef struct sparc_def_t sparc_def_t;
/**
* SPARCCPUClass:
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 84a030e406..8c567037cb 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -660,8 +660,6 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
#endif
#endif
-#define SPARC_CPU_TYPE_SUFFIX "-" TYPE_SPARC_CPU
-#define SPARC_CPU_TYPE_NAME(model) model SPARC_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_SPARC_CPU
#define cpu_list sparc_cpu_list
diff --git a/target/tricore/cpu-qom.h b/target/tricore/cpu-qom.h
index b3b6c75a3a..2598651008 100644
--- a/target/tricore/cpu-qom.h
+++ b/target/tricore/cpu-qom.h
@@ -1,4 +1,6 @@
/*
+ * QEMU TriCore CPU QOM header (target agnostic)
+ *
* Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
*
* This library is free software; you can redistribute it and/or
@@ -26,6 +28,9 @@
OBJECT_DECLARE_CPU_TYPE(TriCoreCPU, TriCoreCPUClass, TRICORE_CPU)
+#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
+#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
+
struct TriCoreCPUClass {
CPUClass parent_class;
diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index b4a6ab141d..c537a33ee8 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -268,8 +268,6 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, vaddr *pc,
*flags = new_flags;
}
-#define TRICORE_CPU_TYPE_SUFFIX "-" TYPE_TRICORE_CPU
-#define TRICORE_CPU_TYPE_NAME(model) model TRICORE_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU
/* helpers.c */
diff --git a/target/xtensa/cpu-qom.h b/target/xtensa/cpu-qom.h
index 424bcbd8dd..03873ea50b 100644
--- a/target/xtensa/cpu-qom.h
+++ b/target/xtensa/cpu-qom.h
@@ -1,5 +1,5 @@
/*
- * QEMU Xtensa CPU
+ * QEMU Xtensa CPU QOM header (target agnostic)
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
* All rights reserved.
@@ -36,6 +36,9 @@
OBJECT_DECLARE_CPU_TYPE(XtensaCPU, XtensaCPUClass, XTENSA_CPU)
+#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
+#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
+
typedef struct XtensaConfig XtensaConfig;
/**
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 85aab1bdf8..d6d2fb1f4e 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -586,8 +586,6 @@ G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
#define cpu_list xtensa_cpu_list
-#define XTENSA_CPU_TYPE_SUFFIX "-" TYPE_XTENSA_CPU
-#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
#if TARGET_BIG_ENDIAN
--
2.41.0
next prev parent reply other threads:[~2023-11-06 11:09 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-06 11:02 [PULL 00/60] Misc HW/UI patches for 2023-11-06 Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 01/60] vl: Free machine list Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 02/60] vl: constify default_list Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 03/60] tests/vm/ubuntu.aarch64: Correct comment about TCG specific delay Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 04/60] tests/unit/test-seccomp: Remove mentions of softmmu in test names Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 05/60] accel/tcg: Declare tcg_flush_jmp_cache() in 'exec/tb-flush.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 06/60] accel: Introduce cpu_exec_reset_hold() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 07/60] accel/tcg: Factor tcg_cpu_reset_hold() out Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 08/60] target: Unify QOM style Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 09/60] target: Mention 'cpu-qom.h' is target agnostic Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 10/60] target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 11/60] target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 12/60] target/riscv: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` Philippe Mathieu-Daudé [this message]
2023-11-06 11:02 ` [PULL 14/60] target/hexagon: Declare QOM definitions in 'cpu-qom.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 15/60] target/loongarch: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 16/60] target/nios2: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 17/60] target/openrisc: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 18/60] target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 19/60] target/ppc: Use env_archcpu() in helper_book3s_msgsndp() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 20/60] target/riscv: Use env_archcpu() in [check_]nanbox() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 21/60] target/s390x: Use env_archcpu() in handle_diag_308() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 22/60] target/xtensa: Use env_archcpu() in update_c[compare|count]() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 23/60] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 24/60] target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr]() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 25/60] target/i386/hvf: Use CPUState typedef Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 26/60] target/i386/hvf: Rename 'CPUState *cpu' variable as 'cs' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 27/60] target/i386/hvf: Rename 'X86CPU *x86_cpu' variable as 'cpu' Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 28/60] target/i386/kvm: Correct comment in kvm_cpu_realize() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 29/60] target/i386/monitor: synchronize cpu state for lapic info Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 30/60] target/mips: Fix MSA BZ/BNZ opcodes displacement Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 31/60] target/mips: Fix TX79 LQ/SQ opcodes Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 32/60] sysemu/kvm: Restrict kvmppc_get_radix_page_info() to ppc targets Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 33/60] hw/ppc/e500: Restrict ppce500_init_mpic_kvm() to KVM Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 34/60] target/ppc: Restrict KVM objects to system emulation Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 35/60] target/ppc: Prohibit target specific KVM prototypes on user emulation Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 36/60] target/nios2: Create IRQs *after* accelerator vCPU is realized Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 37/60] target/alpha: Tidy up alpha_cpu_class_by_name() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 38/60] hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 39/60] exec/cpu: Have cpu_exec_realize() return a boolean Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 40/60] hw/cpu: Clean up global variable shadowing Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 41/60] hw/loader: Clean up global variable shadowing in rom_add_file() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 42/60] hw/isa/i82378: Propagate error if PC_SPEAKER device creation failed Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 43/60] hw/i386: Fix comment style in topology.h Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 44/60] tests/unit: Rename test-x86-cpuid.c to test-x86-topo.c Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 45/60] system/cpus: Fix CPUState.nr_cores' calculation Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 46/60] hw/cpu: Update the comments of nr_cores and nr_dies Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 47/60] hw/ide: reset: cancel async DMA operation before resetting state Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 48/60] tests/qtest: ahci-test: add test exposing reset issue with pending callback Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 49/60] hw/i2c: pmbus add support for block receive Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 50/60] hw/i2c: pmbus: add vout mode bitfields Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 51/60] hw/i2c: pmbus: add fan support Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 52/60] hw/i2c: pmbus: add VCAP register Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 53/60] hw/sensor: add ADM1266 device model Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 54/60] tests/qtest: add tests for ADM1266 Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 55/60] hw/i2c: pmbus: immediately clear faults on request Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 56/60] hw/i2c: pmbus: reset page register for out of range reads Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 57/60] MAINTAINERS: Add include/hw/timer/tmu012.h to the SH4 R2D section Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 58/60] MAINTAINERS: Add the CAN documentation file to the CAN section Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 59/60] MAINTAINERS: update libvirt devel mailing list address Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 60/60] ui/sdl2: use correct key names in win title on mac Philippe Mathieu-Daudé
2023-11-07 1:39 ` [PULL 00/60] Misc HW/UI patches for 2023-11-06 Stefan Hajnoczi
2023-11-07 8:51 ` Philippe Mathieu-Daudé
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