From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: kvm@vger.kernel.org, qemu-s390x@nongnu.org,
	qemu-block@nongnu.org, qemu-riscv@nongnu.org,
	qemu-ppc@nongnu.org, qemu-arm@nongnu.org,
	"Zhuocheng Ding" <zhuocheng.ding@intel.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Babu Moger" <babu.moger@amd.com>,
	"Yongwei Ma" <yongwei.ma@intel.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PULL 45/60] system/cpus: Fix CPUState.nr_cores' calculation
Date: Mon,  6 Nov 2023 12:03:17 +0100	[thread overview]
Message-ID: <20231106110336.358-46-philmd@linaro.org> (raw)
In-Reply-To: <20231106110336.358-1-philmd@linaro.org>
From: Zhuocheng Ding <zhuocheng.ding@intel.com>
From CPUState.nr_cores' comment, it represents "number of cores within
this CPU package".
After 003f230e37d7 ("machine: Tweak the order of topology members in
struct CpuTopology"), the meaning of smp.cores changed to "the number of
cores in one die", but this commit missed to change CPUState.nr_cores'
calculation, so that CPUState.nr_cores became wrong and now it
misses to consider numbers of clusters and dies.
At present, only i386 is using CPUState.nr_cores.
But as for i386, which supports die level, the uses of CPUState.nr_cores
are very confusing:
Early uses are based on the meaning of "cores per package" (before die
is introduced into i386), and later uses are based on "cores per die"
(after die's introduction).
This difference is due to that commit a94e1428991f ("target/i386: Add
CPUID.1F generation support for multi-dies PCMachine") misunderstood
that CPUState.nr_cores means "cores per die" when calculated
CPUID.1FH.01H:EBX. After that, the changes in i386 all followed this
wrong understanding.
With the influence of 003f230e37d7 and a94e1428991f, for i386 currently
the result of CPUState.nr_cores is "cores per die", thus the original
uses of CPUState.cores based on the meaning of "cores per package" are
wrong when multiple dies exist:
1. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.01H:EBX[bits 23:16] is
   incorrect because it expects "cpus per package" but now the
   result is "cpus per die".
2. In cpu_x86_cpuid() of target/i386/cpu.c, for all leaves of CPUID.04H:
   EAX[bits 31:26] is incorrect because they expect "cpus per package"
   but now the result is "cpus per die". The error not only impacts the
   EAX calculation in cache_info_passthrough case, but also impacts other
   cases of setting cache topology for Intel CPU according to cpu
   topology (specifically, the incoming parameter "num_cores" expects
   "cores per package" in encode_cache_cpuid4()).
3. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.0BH.01H:EBX[bits
   15:00] is incorrect because the EBX of 0BH.01H (core level) expects
   "cpus per package", which may be different with 1FH.01H (The reason
   is 1FH can support more levels. For QEMU, 1FH also supports die,
   1FH.01H:EBX[bits 15:00] expects "cpus per die").
4. In cpu_x86_cpuid() of target/i386/cpu.c, when CPUID.80000001H is
   calculated, here "cpus per package" is expected to be checked, but in
   fact, now it checks "cpus per die". Though "cpus per die" also works
   for this code logic, this isn't consistent with AMD's APM.
5. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.80000008H:ECX expects
   "cpus per package" but it obtains "cpus per die".
6. In simulate_rdmsr() of target/i386/hvf/x86_emu.c, in
   kvm_rdmsr_core_thread_count() of target/i386/kvm/kvm.c, and in
   helper_rdmsr() of target/i386/tcg/sysemu/misc_helper.c,
   MSR_CORE_THREAD_COUNT expects "cpus per package" and "cores per
   package", but in these functions, it obtains "cpus per die" and
   "cores per die".
On the other hand, these uses are correct now (they are added in/after
a94e1428991f):
1. In cpu_x86_cpuid() of target/i386/cpu.c, topo_info.cores_per_die
   meets the actual meaning of CPUState.nr_cores ("cores per die").
2. In cpu_x86_cpuid() of target/i386/cpu.c, vcpus_per_socket (in CPUID.
   04H's calculation) considers number of dies, so it's correct.
3. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.1FH.01H:EBX[bits
   15:00] needs "cpus per die" and it gets the correct result, and
   CPUID.1FH.02H:EBX[bits 15:00] gets correct "cpus per package".
When CPUState.nr_cores is correctly changed to "cores per package" again
, the above errors will be fixed without extra work, but the "currently"
correct cases will go wrong and need special handling to pass correct
"cpus/cores per die" they want.
Fix CPUState.nr_cores' calculation to fit the original meaning "cores
per package", as well as changing calculation of topo_info.cores_per_die,
vcpus_per_socket and CPUID.1FH.
Fixes: a94e1428991f ("target/i386: Add CPUID.1F generation support for multi-dies PCMachine")
Fixes: 003f230e37d7 ("machine: Tweak the order of topology members in struct CpuTopology")
Signed-off-by: Zhuocheng Ding <zhuocheng.ding@intel.com>
Co-developed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Tested-by: Babu Moger <babu.moger@amd.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20231024090323.1859210-4-zhao1.liu@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 system/cpus.c     | 2 +-
 target/i386/cpu.c | 9 ++++-----
 2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/system/cpus.c b/system/cpus.c
index 952f15868c..a444a747f0 100644
--- a/system/cpus.c
+++ b/system/cpus.c
@@ -631,7 +631,7 @@ void qemu_init_vcpu(CPUState *cpu)
 {
     MachineState *ms = MACHINE(qdev_get_machine());
 
-    cpu->nr_cores = ms->smp.cores;
+    cpu->nr_cores = machine_topo_get_cores_per_socket(ms);
     cpu->nr_threads =  ms->smp.threads;
     cpu->stopped = true;
     cpu->random_seed = qemu_guest_random_seed_thread_part1();
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index fc8484cb5e..358d9c0a65 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6019,7 +6019,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
     X86CPUTopoInfo topo_info;
 
     topo_info.dies_per_pkg = env->nr_dies;
-    topo_info.cores_per_die = cs->nr_cores;
+    topo_info.cores_per_die = cs->nr_cores / env->nr_dies;
     topo_info.threads_per_core = cs->nr_threads;
 
     /* Calculate & apply limits for different index ranges */
@@ -6095,8 +6095,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
              */
             if (*eax & 31) {
                 int host_vcpus_per_cache = 1 + ((*eax & 0x3FFC000) >> 14);
-                int vcpus_per_socket = env->nr_dies * cs->nr_cores *
-                                       cs->nr_threads;
+                int vcpus_per_socket = cs->nr_cores * cs->nr_threads;
                 if (cs->nr_cores > 1) {
                     *eax &= ~0xFC000000;
                     *eax |= (pow2ceil(cs->nr_cores) - 1) << 26;
@@ -6273,12 +6272,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             break;
         case 1:
             *eax = apicid_die_offset(&topo_info);
-            *ebx = cs->nr_cores * cs->nr_threads;
+            *ebx = topo_info.cores_per_die * topo_info.threads_per_core;
             *ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
             break;
         case 2:
             *eax = apicid_pkg_offset(&topo_info);
-            *ebx = env->nr_dies * cs->nr_cores * cs->nr_threads;
+            *ebx = cs->nr_cores * cs->nr_threads;
             *ecx |= CPUID_TOPOLOGY_LEVEL_DIE;
             break;
         default:
-- 
2.41.0
next prev parent reply	other threads:[~2023-11-06 11:23 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-06 11:02 [PULL 00/60] Misc HW/UI patches for 2023-11-06 Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 01/60] vl: Free machine list Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 02/60] vl: constify default_list Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 03/60] tests/vm/ubuntu.aarch64: Correct comment about TCG specific delay Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 04/60] tests/unit/test-seccomp: Remove mentions of softmmu in test names Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 05/60] accel/tcg: Declare tcg_flush_jmp_cache() in 'exec/tb-flush.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 06/60] accel: Introduce cpu_exec_reset_hold() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 07/60] accel/tcg: Factor tcg_cpu_reset_hold() out Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 08/60] target: Unify QOM style Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 09/60] target: Mention 'cpu-qom.h' is target agnostic Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 10/60] target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 11/60] target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 12/60] target/riscv: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 13/60] target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 14/60] target/hexagon: Declare QOM definitions " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 15/60] target/loongarch: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 16/60] target/nios2: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 17/60] target/openrisc: " Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 18/60] target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 19/60] target/ppc: Use env_archcpu() in helper_book3s_msgsndp() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 20/60] target/riscv: Use env_archcpu() in [check_]nanbox() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 21/60] target/s390x: Use env_archcpu() in handle_diag_308() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 22/60] target/xtensa: Use env_archcpu() in update_c[compare|count]() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 23/60] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 24/60] target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr]() Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 25/60] target/i386/hvf: Use CPUState typedef Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 26/60] target/i386/hvf: Rename 'CPUState *cpu' variable as 'cs' Philippe Mathieu-Daudé
2023-11-06 11:02 ` [PULL 27/60] target/i386/hvf: Rename 'X86CPU *x86_cpu' variable as 'cpu' Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 28/60] target/i386/kvm: Correct comment in kvm_cpu_realize() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 29/60] target/i386/monitor: synchronize cpu state for lapic info Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 30/60] target/mips: Fix MSA BZ/BNZ opcodes displacement Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 31/60] target/mips: Fix TX79 LQ/SQ opcodes Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 32/60] sysemu/kvm: Restrict kvmppc_get_radix_page_info() to ppc targets Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 33/60] hw/ppc/e500: Restrict ppce500_init_mpic_kvm() to KVM Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 34/60] target/ppc: Restrict KVM objects to system emulation Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 35/60] target/ppc: Prohibit target specific KVM prototypes on user emulation Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 36/60] target/nios2: Create IRQs *after* accelerator vCPU is realized Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 37/60] target/alpha: Tidy up alpha_cpu_class_by_name() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 38/60] hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 39/60] exec/cpu: Have cpu_exec_realize() return a boolean Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 40/60] hw/cpu: Clean up global variable shadowing Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 41/60] hw/loader: Clean up global variable shadowing in rom_add_file() Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 42/60] hw/isa/i82378: Propagate error if PC_SPEAKER device creation failed Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 43/60] hw/i386: Fix comment style in topology.h Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 44/60] tests/unit: Rename test-x86-cpuid.c to test-x86-topo.c Philippe Mathieu-Daudé
2023-11-06 11:03 ` Philippe Mathieu-Daudé [this message]
2023-11-06 11:03 ` [PULL 46/60] hw/cpu: Update the comments of nr_cores and nr_dies Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 47/60] hw/ide: reset: cancel async DMA operation before resetting state Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 48/60] tests/qtest: ahci-test: add test exposing reset issue with pending callback Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 49/60] hw/i2c: pmbus add support for block receive Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 50/60] hw/i2c: pmbus: add vout mode bitfields Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 51/60] hw/i2c: pmbus: add fan support Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 52/60] hw/i2c: pmbus: add VCAP register Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 53/60] hw/sensor: add ADM1266 device model Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 54/60] tests/qtest: add tests for ADM1266 Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 55/60] hw/i2c: pmbus: immediately clear faults on request Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 56/60] hw/i2c: pmbus: reset page register for out of range reads Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 57/60] MAINTAINERS: Add include/hw/timer/tmu012.h to the SH4 R2D section Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 58/60] MAINTAINERS: Add the CAN documentation file to the CAN section Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 59/60] MAINTAINERS: update libvirt devel mailing list address Philippe Mathieu-Daudé
2023-11-06 11:03 ` [PULL 60/60] ui/sdl2: use correct key names in win title on mac Philippe Mathieu-Daudé
2023-11-07  1:39 ` [PULL 00/60] Misc HW/UI patches for 2023-11-06 Stefan Hajnoczi
2023-11-07  8:51   ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox
  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):
  git send-email \
    --in-reply-to=20231106110336.358-46-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=babu.moger@amd.com \
    --cc=kvm@vger.kernel.org \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=qemu-s390x@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=yongwei.ma@intel.com \
    --cc=zhao1.liu@intel.com \
    --cc=zhuocheng.ding@intel.com \
    /path/to/YOUR_REPLY
  https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
  Be sure your reply has a Subject: header at the top and a blank line
  before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).