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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 18/85] target/hppa: Make HPPA_BTLB_ENTRIES variable
Date: Mon,  6 Nov 2023 19:03:00 -0800	[thread overview]
Message-ID: <20231107030407.8979-19-richard.henderson@linaro.org> (raw)
In-Reply-To: <20231107030407.8979-1-richard.henderson@linaro.org>

Depend on hppa_is_pa20.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/cpu.h        | 19 +++++++++++--------
 hw/hppa/machine.c        |  9 +++------
 target/hppa/machine.c    |  3 ++-
 target/hppa/mem_helper.c | 40 ++++++++++++++++++++++------------------
 4 files changed, 38 insertions(+), 33 deletions(-)

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 0ac307e0e9..48ddcffb8a 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -227,15 +227,13 @@ typedef struct CPUArchState {
     target_ureg cr_back[2];  /* back of cr17/cr18 */
     target_ureg shadow[7];   /* shadow registers */
 
-    /* ??? The number of entries isn't specified by the architecture.  */
-#ifdef TARGET_HPPA64
-#define HPPA_BTLB_FIXED         0       /* BTLBs are not supported in 64-bit machines */
-#else
-#define HPPA_BTLB_FIXED         16
-#endif
-#define HPPA_BTLB_VARIABLE      0
+    /*
+     * ??? The number of entries isn't specified by the architecture.
+     * BTLBs are not supported in 64-bit machines.
+     */
+#define PA10_BTLB_FIXED         16
+#define PA10_BTLB_VARIABLE      0
 #define HPPA_TLB_ENTRIES        256
-#define HPPA_BTLB_ENTRIES       (HPPA_BTLB_FIXED + HPPA_BTLB_VARIABLE)
 
     /* Index for round-robin tlb eviction. */
     uint32_t tlb_last;
@@ -277,6 +275,11 @@ static inline bool hppa_is_pa20(CPUHPPAState *env)
     return object_dynamic_cast(OBJECT(env_cpu(env)), TYPE_HPPA64_CPU) != NULL;
 }
 
+static inline int HPPA_BTLB_ENTRIES(CPUHPPAState *env)
+{
+    return hppa_is_pa20(env) ? 0 : PA10_BTLB_FIXED + PA10_BTLB_VARIABLE;
+}
+
 static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch)
 {
 #ifdef CONFIG_USER_ONLY
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 67d4d1b5e0..85682e6bab 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -185,6 +185,7 @@ static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus)
     uint64_t val;
     const char qemu_version[] = QEMU_VERSION;
     MachineClass *mc = MACHINE_GET_CLASS(ms);
+    int btlb_entries = HPPA_BTLB_ENTRIES(&cpu[0]->env);
     int len;
 
     fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
@@ -196,11 +197,11 @@ static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus)
     fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
                     g_memdup(&val, sizeof(val)), sizeof(val));
 
-    val = cpu_to_le64(HPPA_TLB_ENTRIES - HPPA_BTLB_ENTRIES);
+    val = cpu_to_le64(HPPA_TLB_ENTRIES - btlb_entries);
     fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
                     g_memdup(&val, sizeof(val)), sizeof(val));
 
-    val = cpu_to_le64(HPPA_BTLB_ENTRIES);
+    val = cpu_to_le64(btlb_entries);
     fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
                     g_memdup(&val, sizeof(val)), sizeof(val));
 
@@ -608,10 +609,6 @@ static void hppa_machine_reset(MachineState *ms, ShutdownCause reason)
 
         cs->exception_index = -1;
         cs->halted = 0;
-
-        /* clear any existing TLB and BTLB entries */
-        memset(cpu[i]->env.tlb, 0, sizeof(cpu[i]->env.tlb));
-        cpu[i]->env.tlb_last = HPPA_BTLB_ENTRIES;
     }
 
     /* already initialized by machine_hppa_init()? */
diff --git a/target/hppa/machine.c b/target/hppa/machine.c
index 61ae942ff1..473305ffea 100644
--- a/target/hppa/machine.c
+++ b/target/hppa/machine.c
@@ -139,6 +139,7 @@ static int tlb_pre_load(void *opaque)
 static int tlb_post_load(void *opaque, int version_id)
 {
     CPUHPPAState *env = opaque;
+    uint32_t btlb_entries = HPPA_BTLB_ENTRIES(env);
     HPPATLBEntry **unused = &env->tlb_unused;
     HPPATLBEntry *partial = NULL;
 
@@ -152,7 +153,7 @@ static int tlb_post_load(void *opaque, int version_id)
 
         if (e->entry_valid) {
             interval_tree_insert(&e->itree, &env->tlb_root);
-        } else if (i < HPPA_BTLB_ENTRIES) {
+        } else if (i < btlb_entries) {
             /* btlb not in unused list */
         } else if (partial == NULL && e->itree.start < e->itree.last) {
             partial = e;
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index b1773ece61..327fb20c17 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -57,7 +57,7 @@ static void hppa_flush_tlb_ent(CPUHPPAState *env, HPPATLBEntry *ent,
                               HPPA_MMU_FLUSH_MASK, TARGET_LONG_BITS);
 
     /* Never clear BTLBs, unless forced to do so. */
-    is_btlb = ent < &env->tlb[HPPA_BTLB_ENTRIES];
+    is_btlb = ent < &env->tlb[HPPA_BTLB_ENTRIES(env)];
     if (is_btlb && !force_flush_btlb) {
         return;
     }
@@ -93,10 +93,11 @@ static HPPATLBEntry *hppa_alloc_tlb_ent(CPUHPPAState *env)
     HPPATLBEntry *ent = env->tlb_unused;
 
     if (ent == NULL) {
+        uint32_t btlb_entries = HPPA_BTLB_ENTRIES(env);
         uint32_t i = env->tlb_last;
 
-        if (i < HPPA_BTLB_ENTRIES || i >= ARRAY_SIZE(env->tlb)) {
-            i = HPPA_BTLB_ENTRIES;
+        if (i < btlb_entries || i >= ARRAY_SIZE(env->tlb)) {
+            i = btlb_entries;
         }
         env->tlb_last = i + 1;
 
@@ -385,23 +386,24 @@ void HELPER(ptlb)(CPUHPPAState *env, target_ulong addr)
 
 void hppa_ptlbe(CPUHPPAState *env)
 {
+    uint32_t btlb_entries = HPPA_BTLB_ENTRIES(env);
     uint32_t i;
 
     /* Zap the (non-btlb) tlb entries themselves. */
-    memset(&env->tlb[HPPA_BTLB_ENTRIES], 0,
-           sizeof(env->tlb) - HPPA_BTLB_ENTRIES * sizeof(env->tlb[0]));
-    env->tlb_last = HPPA_BTLB_ENTRIES;
+    memset(&env->tlb[btlb_entries], 0,
+           sizeof(env->tlb) - btlb_entries * sizeof(env->tlb[0]));
+    env->tlb_last = btlb_entries;
     env->tlb_partial = NULL;
 
     /* Put them all onto the unused list. */
-    env->tlb_unused = &env->tlb[HPPA_BTLB_ENTRIES];
-    for (i = HPPA_BTLB_ENTRIES; i < ARRAY_SIZE(env->tlb) - 1; ++i) {
+    env->tlb_unused = &env->tlb[btlb_entries];
+    for (i = btlb_entries; i < ARRAY_SIZE(env->tlb) - 1; ++i) {
         env->tlb[i].unused_next = &env->tlb[i + 1];
     }
 
     /* Re-initialize the interval tree with only the btlb entries. */
     memset(&env->tlb_root, 0, sizeof(env->tlb_root));
-    for (i = 0; i < HPPA_BTLB_ENTRIES; ++i) {
+    for (i = 0; i < btlb_entries; ++i) {
         if (env->tlb[i].entry_valid) {
             interval_tree_insert(&env->tlb[i].itree, &env->tlb_root);
         }
@@ -473,12 +475,14 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
     HPPATLBEntry *btlb;
     uint64_t virt_page;
     uint32_t *vaddr;
+    uint32_t btlb_entries = HPPA_BTLB_ENTRIES(env);
 
-#ifdef TARGET_HPPA64
     /* BTLBs are not supported on 64-bit CPUs */
-    env->gr[28] = -1; /* nonexistent procedure */
-    return;
-#endif
+    if (btlb_entries == 0) {
+        env->gr[28] = -1; /* nonexistent procedure */
+        return;
+    }
+
     env->gr[28] = 0; /* PDC_OK */
 
     switch (env->gr[25]) {
@@ -492,8 +496,8 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
         } else {
             vaddr[0] = cpu_to_be32(1);
             vaddr[1] = cpu_to_be32(16 * 1024);
-            vaddr[2] = cpu_to_be32(HPPA_BTLB_FIXED);
-            vaddr[3] = cpu_to_be32(HPPA_BTLB_VARIABLE);
+            vaddr[2] = cpu_to_be32(PA10_BTLB_FIXED);
+            vaddr[3] = cpu_to_be32(PA10_BTLB_VARIABLE);
         }
         break;
     case 1:
@@ -510,7 +514,7 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
                     (long long) virt_page << TARGET_PAGE_BITS,
                     (long long) (virt_page + len) << TARGET_PAGE_BITS,
                     (long long) virt_page, phys_page, len, slot);
-        if (slot < HPPA_BTLB_ENTRIES) {
+        if (slot < btlb_entries) {
             btlb = &env->tlb[slot];
 
             /* Force flush of possibly existing BTLB entry. */
@@ -532,7 +536,7 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
         slot = env->gr[22];
         qemu_log_mask(CPU_LOG_MMU, "PDC_BLOCK_TLB: PDC_BTLB_PURGE slot %d\n",
                                     slot);
-        if (slot < HPPA_BTLB_ENTRIES) {
+        if (slot < btlb_entries) {
             btlb = &env->tlb[slot];
             hppa_flush_tlb_ent(env, btlb, true);
         } else {
@@ -542,7 +546,7 @@ void HELPER(diag_btlb)(CPUHPPAState *env)
     case 3:
         /* Purge all BTLB entries */
         qemu_log_mask(CPU_LOG_MMU, "PDC_BLOCK_TLB: PDC_BTLB_PURGE_ALL\n");
-        for (slot = 0; slot < HPPA_BTLB_ENTRIES; slot++) {
+        for (slot = 0; slot < btlb_entries; slot++) {
             btlb = &env->tlb[slot];
             hppa_flush_tlb_ent(env, btlb, true);
         }
-- 
2.34.1



  parent reply	other threads:[~2023-11-07  3:12 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-07  3:02 [PULL 00/85] target/hppa patch queue Richard Henderson
2023-11-07  3:02 ` [PULL 01/85] target/hppa: Include PSW_P in tb flags and mmu index Richard Henderson
2023-11-07  3:02 ` [PULL 02/85] target/hppa: Rename hppa_tlb_entry to HPPATLBEntry Richard Henderson
2023-11-07  3:02 ` [PULL 03/85] target/hppa: Use IntervalTreeNode in HPPATLBEntry Richard Henderson
2023-11-07  3:02 ` [PULL 04/85] target/hppa: Always report one page to tlb_set_page Richard Henderson
2023-11-07  3:02 ` [PULL 05/85] target/hppa: Split out hppa_flush_tlb_range Richard Henderson
2023-11-07  3:02 ` [PULL 06/85] target/hppa: Populate an interval tree with valid tlb entries Richard Henderson
2023-11-07  3:02 ` [PULL 07/85] target/hppa: Remove get_temp Richard Henderson
2023-11-07  3:02 ` [PULL 08/85] target/hppa: Remove get_temp_tl Richard Henderson
2023-11-07  3:02 ` [PULL 09/85] target/hppa: Remove load_const Richard Henderson
2023-11-07  3:02 ` [PULL 10/85] target/hppa: Fix hppa64 case in machine.c Richard Henderson
2023-11-07  3:02 ` [PULL 11/85] target/hppa: Fix load in do_load_32 Richard Henderson
2023-11-07  3:02 ` [PULL 12/85] target/hppa: Truncate rotate count in trans_shrpw_sar Richard Henderson
2023-11-07  3:02 ` [PULL 13/85] target/hppa: Fix trans_ds for hppa64 Richard Henderson
2023-11-07  3:02 ` [PULL 14/85] target/hppa: Fix do_add, do_sub " Richard Henderson
2023-11-07  3:02 ` [PULL 15/85] target/hppa: Fix bb_sar " Richard Henderson
2023-11-07  3:02 ` [PULL 16/85] target/hppa: Fix extrw and depw with sar " Richard Henderson
2023-11-07  3:02 ` [PULL 17/85] target/hppa: Introduce TYPE_HPPA64_CPU Richard Henderson
2023-11-07  3:03 ` Richard Henderson [this message]
2023-11-07  3:03 ` [PULL 19/85] target/hppa: Implement cpu_list Richard Henderson
2023-11-07  3:03 ` [PULL 20/85] target/hppa: Implement hppa_cpu_class_by_name Richard Henderson
2023-11-07  3:03 ` [PULL 21/85] target/hppa: Update cpu_hppa_get/put_psw for hppa64 Richard Henderson
2023-11-07  3:03 ` [PULL 22/85] target/hppa: Handle absolute addresses for pa2.0 Richard Henderson
2023-11-07  3:03 ` [PULL 23/85] target/hppa: Adjust hppa_cpu_dump_state for hppa64 Richard Henderson
2023-11-07  3:03 ` [PULL 24/85] target/hppa: Fix hppa64 addressing Richard Henderson
2023-11-07  3:03 ` [PULL 25/85] target/hppa: Pass DisasContext to copy_iaoq_entry Richard Henderson
2023-11-07  3:03 ` [PULL 26/85] target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb] Richard Henderson
2023-11-07  3:03 ` [PULL 27/85] target/hppa: Use copy_iaoq_entry for link in do_ibranch Richard Henderson
2023-11-07  3:03 ` [PULL 28/85] target/hppa: Mask inputs in copy_iaoq_entry Richard Henderson
2023-11-07  3:03 ` [PULL 29/85] target/hppa: sar register allows only 5 bits on 32-bit CPU Richard Henderson
2023-11-07  3:03 ` [PULL 30/85] target/hppa: Pass d to do_cond Richard Henderson
2023-11-07  3:03 ` [PULL 31/85] target/hppa: Pass d to do_sub_cond Richard Henderson
2023-11-07  3:03 ` [PULL 32/85] target/hppa: Pass d to do_log_cond Richard Henderson
2023-11-07  3:03 ` [PULL 33/85] target/hppa: Pass d to do_sed_cond Richard Henderson
2023-11-07  3:03 ` [PULL 34/85] target/hppa: Pass d to do_unit_cond Richard Henderson
2023-11-07  3:03 ` [PULL 35/85] linux-user/hppa: Fixes for TARGET_ABI32 Richard Henderson
2023-11-07  3:03 ` [PULL 36/85] target/hppa: Drop attempted gdbstub support for hppa64 Richard Henderson
2023-11-07  3:03 ` [PULL 37/85] target/hppa: Remove TARGET_HPPA64 Richard Henderson
2023-11-07  3:03 ` [PULL 38/85] target/hppa: Decode d for logical instructions Richard Henderson
2023-11-07  3:03 ` [PULL 39/85] target/hppa: Decode d for unit instructions Richard Henderson
2023-11-07  3:03 ` [PULL 40/85] target/hppa: Decode d for cmpclr instructions Richard Henderson
2023-11-07  3:03 ` [PULL 41/85] target/hppa: Decode d for add instructions Richard Henderson
2023-11-07  3:03 ` [PULL 42/85] target/hppa: Decode d for sub instructions Richard Henderson
2023-11-07  3:03 ` [PULL 43/85] target/hppa: Decode d for bb instructions Richard Henderson
2023-11-07  3:03 ` [PULL 44/85] target/hppa: Decode d for cmpb instructions Richard Henderson
2023-11-07  3:03 ` [PULL 45/85] target/hppa: Decode CMPIB double-word Richard Henderson
2023-11-07  3:03 ` [PULL 46/85] target/hppa: Decode ADDB double-word Richard Henderson
2023-11-07  3:03 ` [PULL 47/85] target/hppa: Implement LDD, LDCD, LDDA, STD, STDA Richard Henderson
2023-11-07  3:03 ` [PULL 48/85] target/hppa: Implement DEPD, DEPDI Richard Henderson
2023-11-07  3:03 ` [PULL 49/85] target/hppa: Implement EXTRD Richard Henderson
2023-11-07  3:03 ` [PULL 50/85] target/hppa: Implement SHRPD Richard Henderson
2023-11-07  3:03 ` [PULL 51/85] target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM Richard Henderson
2023-11-07  3:03 ` [PULL 52/85] target/hppa: Implement STDBY Richard Henderson
2023-11-07  3:03 ` [PULL 53/85] target/hppa: Implement IDTLBT, IITLBT Richard Henderson
2023-11-09 15:13   ` Peter Maydell
2023-11-07  3:03 ` [PULL 54/85] hw/hppa: Use uint32_t instead of target_ureg Richard Henderson
2023-11-07  3:03 ` [PULL 55/85] target/hppa: Remove TARGET_REGISTER_BITS Richard Henderson
2023-11-07  3:03 ` [PULL 56/85] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections Richard Henderson
2023-11-07  3:03 ` [PULL 57/85] target/hppa: Remove remaining " Richard Henderson
2023-11-07  3:03 ` [PULL 58/85] target/hppa: Adjust vmstate_env for pa2.0 tlb Richard Henderson
2023-11-07  3:03 ` [PULL 59/85] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new Richard Henderson
2023-11-07  3:03 ` [PULL 60/85] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64 Richard Henderson
2023-11-07  3:03 ` [PULL 61/85] target/hppa: Implement HADD Richard Henderson
2023-11-07  3:03 ` [PULL 62/85] target/hppa: Implement HSUB Richard Henderson
2023-11-07  3:03 ` [PULL 63/85] target/hppa: Implement HAVG Richard Henderson
2023-11-07  3:03 ` [PULL 64/85] target/hppa: Implement HSHL, HSHR Richard Henderson
2023-11-07  3:03 ` [PULL 65/85] target/hppa: Implement HSHLADD, HSHRADD Richard Henderson
2023-11-07  3:03 ` [PULL 66/85] target/hppa: Implement MIXH, MIXW Richard Henderson
2023-11-07  3:03 ` [PULL 67/85] target/hppa: Implement PERMH Richard Henderson
2023-11-07  3:03 ` [PULL 68/85] target/hppa: Fix interruption based on default PSW Richard Henderson
2023-11-07  3:03 ` [PULL 69/85] target/hppa: Precompute zero into DisasContext Richard Henderson
2023-11-07  3:03 ` [PULL 70/85] target/hppa: Return zero for r0 from load_gpr Richard Henderson
2023-11-07  3:03 ` [PULL 71/85] include/hw/elf: Remove truncating signed casts Richard Henderson
2023-11-07  3:03 ` [PULL 72/85] hw/hppa: Translate phys addresses for the cpu Richard Henderson
2023-11-07  3:03 ` [PULL 73/85] linux-user/hppa: Drop EXCP_DUMP from handled exceptions Richard Henderson
2023-11-07  3:03 ` [PULL 74/85] target/hppa: Implement pa2.0 data prefetch instructions Richard Henderson
2023-11-07  3:03 ` [PULL 75/85] target/hppa: Add pa2.0 cpu local tlb flushes Richard Henderson
2023-11-09 15:12   ` Peter Maydell
2023-11-07  3:03 ` [PULL 76/85] target/hppa: Avoid async_safe_run_on_cpu on uniprocessor system Richard Henderson
2023-11-07  3:03 ` [PULL 77/85] target/hppa: Clear upper bits in mtctl for pa1.x Richard Henderson
2023-11-07  3:04 ` [PULL 78/85] target/hppa: Add unwind_breg to CPUHPPAState Richard Henderson
2023-11-07  3:04 ` [PULL 79/85] target/hppa: Create raise_exception_with_ior Richard Henderson
2023-11-07  3:04 ` [PULL 80/85] target/hppa: Update IIAOQ, IIASQ for pa2.0 Richard Henderson
2023-11-07  3:04 ` [PULL 81/85] target/hppa: Improve interrupt logging Richard Henderson
2023-11-07  3:04 ` [PULL 82/85] hw/pci-host/astro: Map Astro chip into 64-bit I/O memory region Richard Henderson
2023-11-07  3:04 ` [PULL 83/85] hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memory Richard Henderson
2023-11-07  3:04 ` [PULL 84/85] hw/hppa: Turn on 64-bit CPU for C3700 machine Richard Henderson
2023-11-07  3:04 ` [PULL 85/85] hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU only Richard Henderson
2023-11-07  9:36 ` [PULL 00/85] target/hppa patch queue Stefan Hajnoczi

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